公开(公告)号：US11509338B2

公开(公告)日：2022-11-22

申请号：US17204618

申请日：2021-03-17

Applicant: Analog Devices, Inc.

Inventor： John Kenney ,  Robert Schell ,  Rahul Vemuri

IPC: H04B1/12

Abstract: Systems and methods are provided for optimizing offset compensation in a receiver with multiple offset compensation D/A converters. At each stage where offset cancellation is applied, there is a fan-out of two or more. At the final stage, comparator offset compensation codes are summed and compared against a digital reference. In one version the digital reference is zero. A second implementation has a non-zero digital reference which is the sum of comparator offsets stored from start up. The difference between the sum of offsets and digital reference is applied to a digital accumulator. The most significant bits of the digital accumulator are applied to a digital D/A converter, which cancel analog offsets in an intermediate stage of amplifiers. The summation of offsets feeding into an accumulator is implemented for all preceding stages.