公开(公告)号：US11829864B2

公开(公告)日：2023-11-28

申请号：US17983320

申请日：2022-11-08

Applicant: Analog Devices, Inc.

Inventor： Sung Ung Kwak ,  Robert Michael Muchsel

IPC: G06N3/063 ,  G06F7/496 ,  G06F7/501 ,  G06F9/30 ,  G06F17/16 ,  G06G7/16 ,  G06N3/065

CPC classification number: G06N3/063 ,  G06F7/496 ,  G06F7/501 ,  G06F9/3001 ,  G06F9/30036 ,  G06F17/16 ,  G06G7/16 ,  G06N3/065

Abstract: An energy-efficient multiplication circuit uses analog multipliers and adders to reduce the distance that data has to move and the number of times that the data has to be moved when performing matrix multiplications in the analog domain. The multiplication circuit is tailored to bitwise multiply the innermost product of a rearranged matrix formula generate a matrix multiplication result in form of a current that is then digitized for further processing.

公开(公告)号：US20230121532A1

公开(公告)日：2023-04-20

申请号：US17983320

申请日：2022-11-08

Applicant: Analog Devices, Inc.

Inventor： Sung Ung Kwak ,  Robert Michael Muchsel

IPC: G06N3/063 ,  G06F7/496 ,  G06F7/501 ,  G06F9/30 ,  G06F17/16 ,  G06G7/16 ,  G06N3/065

Abstract: An energy-efficient multiplication circuit uses analog multipliers and adders to reduce the distance that data has to move and the number of times that the data has to be moved when performing matrix multiplications in the analog domain. The multiplication circuit is tailored to bitwise multiply the innermost product of a rearranged matrix formula generate a matrix multiplication result in form of a current that is then digitized for further processing.