公开(公告)号：US10523016B2

公开(公告)日：2019-12-31

申请号：US15146616

申请日：2016-05-04

Applicant: Analog Devices Global

Inventor： Stefan Hacker ,  Andreas Koch ,  Ralph Patrick McCormick

IPC: H02H11/00 ,  H02J4/00 ,  G08C19/00 ,  H04B3/56

Abstract: An apparatus is provided comprising: a first power domain that includes a first component that operates at a first voltage level; a second power domain that includes a media access controller (MAC) that operates at a second voltage level; and a third power domain that includes a physical media access (PHY) device that operates at a third voltage level; wherein the first voltage level is higher than the second voltage level; and wherein the second voltage level is unreferenced; further including: a first reinforced electrical isolation circuit disposed on a first circuit path that includes at least one signal lane that extends between the first power domain and the second power domain; and a second reinforced electrical isolation circuit disposed on a second circuit path that includes at least one signal lane that extends between the MAC device and the PHY device.

公开(公告)号：US10389507B2

公开(公告)日：2019-08-20

申请号：US15296653

申请日：2016-10-18

Applicant: Analog Devices Global

Inventor： Andreas Koch ,  Stefan Hacker

IPC: H04B5/00 ,  H04L5/14 ,  H04B3/54 ,  H04B3/56 ,  H04L25/49

Abstract: Techniques for duplex communication and power transfer across an isolator are provided. In an example, a first transceiver coupled to a first side of an isolator can include a transmit modulator configured to receive first data and timing signals, to provide control signals to oscillate an output of the transceiver to transmit power and to order each half-cycle of an oscillation cycle of the output to transmit the first data. A second transceiver coupled to a second side of the isolator can include a receive detection circuit configured to compare a received oscillation cycle with a plurality of thresholds and to provide a plurality of comparator outputs indicative of reception of the positive half-cycle and the negative half-cycle, and a receive decoder configured to identify the order of half-cycles and to provide an output indicative of logic level of the first data.

公开(公告)号：US20170324251A1

公开(公告)日：2017-11-09

申请号：US15146616

申请日：2016-05-04

Applicant: Analog Devices Global

Inventor： Stefan Hacker ,  Andreas Koch ,  Ralph Patrick McCormick

IPC: H02J4/00

CPC classification number: H02J4/00 ,  G08C19/00 ,  H04B3/56 ,  H04B2203/5491

Abstract: An apparatus is provided comprising: a first power domain that includes a first component that operates at a first voltage level; a second power domain that includes a media access controller (MAC) that operates at a second voltage level; and a third power domain that includes a physical media access (PHY) device that operates at a third voltage level; wherein the first voltage level is higher than the second voltage level; and wherein the second voltage level is unreferenced; further including: a first reinforced electrical isolation circuit disposed on a first circuit path that includes at least one signal lane that extends between the first power domain and the second power domain; and a second reinforced electrical isolation circuit disposed on a second circuit path that includes at least one signal lane that extends between the MAC device and the PHY device.