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公开(公告)号：US20090193297A1
公开(公告)日：2009-07-30
申请号：US12318442
申请日：2008-12-30
申请人： Michael John Williams , Richard Roy Grisenthwaite , Andrew Brookfield Swaine , John Michael Horley
发明人： Michael John Williams , Richard Roy Grisenthwaite , Andrew Brookfield Swaine , John Michael Horley
IPC分类号： G06F11/28
CPC分类号： G06F11/3636
摘要： A data processing system 1 has a processor core 2 which is programmable to act as one of a plurality of virtual machines each identified by a virtual machine identifier, each virtual machine acting in one of a plurality of contexts each identified by a context identifier, each context executing a sequence of program instructions, each program instruction having one or more associated memory addresses. The data processing system has diagnostic circuitry 10 for performing diagnostic operations on the processor core. Diagnostic control circuitry 12 is provided which is responsive to current values of the virtual machine identifier, the context identifier and at least one of the one or more associated memory addresses to trigger the diagnostic circuitry 10 to perform diagnostic operations.
摘要翻译： 数据处理系统1具有处理器核心2，其可编程以充当多个虚拟机中的一个，每个虚拟机由虚拟机标识符标识，每个虚拟机以每个由上下文标识符标识的多个上下文之一起作用， 上下文执行程序指令序列，每个程序指令具有一个或多个关联的存储器地址。 数据处理系统具有用于在处理器核上进行诊断操作的诊断电路10。 提供了诊断控制电路12，其响应虚拟机标识符，上下文标识符的当前值和一个或多个相关联的存储器地址中的至少一个来触发诊断电路10执行诊断操作。
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公开(公告)号：US07870437B2
公开(公告)日：2011-01-11
申请号：US11984221
申请日：2007-11-14
IPC分类号： G06F11/00
CPC分类号： G06F11/3476 , G06F11/348 , G06F2201/865
摘要： A data processing apparatus is provided, comprising monitored circuitry for performing activities, trace circuitry for producing a stream of trace elements representative of at least some of these activities, and detection circuitry for detecting the occurrence of a predetermined subset of the activities for which the trace circuitry is producing trace elements. When an activity in that predetermined subset of activities is detected a timing indication is added to the stream of trace elements. Hence, the valuable trace bandwidth- may be preserved, by limiting the trace elements for which a timing indication is added into the trace stream to a predetermined subset of the activities for which trace elements are generated, and the valuable global or relative timing accuracy of those activities represented in the trace stream is retained, without flooding the trace stream with timing indications.
摘要翻译： 提供了一种数据处理装置，包括用于执行活动的被监测电路，用于产生表示这些活动中的至少一些的微量元素流的跟踪电路，以及检测电路，用于检测所述活动的预定子集的发生 电路正在产生微量元素。 当检测到该预定活动子集中的活动时，将定时指示添加到微量元素流。 因此，可以通过将跟踪流中添加定时指示的跟踪元素限制到生成微量元素的活动的预定子集，并将有价值的全局或相对定时精度保留在有价值的跟踪带宽中 在跟踪流中表示的那些活动被保留，而不会使跟踪流与时间指示淹没。
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公开(公告)号：US08250411B2
公开(公告)日：2012-08-21
申请号：US12318442
申请日：2008-12-30
申请人： Michael John Williams , Richard Roy Grisenthwaite , Andrew Brookfield Swaine , John Michael Horley
发明人： Michael John Williams , Richard Roy Grisenthwaite , Andrew Brookfield Swaine , John Michael Horley
IPC分类号： G06F11/00
CPC分类号： G06F11/3636
摘要： A data processing system 1 has a processor core 2 which is programmable to act as one of a plurality of virtual machines each identified by a virtual machine identifier, each virtual machine acting in one of a plurality of contexts each identified by a context identifier, each context executing a sequence of program instructions, each program instruction having one or more associated memory addresses. The data processing system has diagnostic circuitry 10 for performing diagnostic operations on the processor core. Diagnostic control circuitry 12 is provided which is responsive to current values of the virtual machine identifier, the context identifier and at least one of the one or more associated memory addresses to trigger the diagnostic circuitry 10 to perform diagnostic operations.
摘要翻译： 数据处理系统1具有处理器核心2，其可编程以充当多个虚拟机中的一个，每个虚拟机由虚拟机标识符标识，每个虚拟机以每个由上下文标识符标识的多个上下文之一起作用， 上下文执行程序指令序列，每个程序指令具有一个或多个关联的存储器地址。 数据处理系统具有用于在处理器核上进行诊断操作的诊断电路10。 提供了诊断控制电路12，其响应虚拟机标识符，上下文标识符的当前值和一个或多个相关联的存储器地址中的至少一个来触发诊断电路10执行诊断操作。
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公开(公告)号：US20090125756A1
公开(公告)日：2009-05-14
申请号：US11984221
申请日：2007-11-14
IPC分类号： G06F11/34
CPC分类号： G06F11/3476 , G06F11/348 , G06F2201/865
摘要： A data processing apparatus is provided, comprising monitored circuitry for performing activities, trace circuitry for producing a stream of trace elements representative of at least some of these activities, and detection circuitry for detecting the occurrence of a predetermined subset of the activities for which the trace circuitry is producing trace elements. When an activity in that predetermined subset of activities is detected a timing indication is added to the stream of trace elements. Hence, the valuable trace bandwidth- may be preserved, by limiting the trace elements for which a timing indication is added into the trace stream to a predetermined subset of the activities for which trace elements are generated, and the valuable global or relative timing accuracy of those activities represented in the trace stream is retained, without flooding the trace stream with timing indications.
摘要翻译： 提供了一种数据处理装置，包括用于执行活动的被监测电路，用于产生表示这些活动中的至少一些的微量元素流的跟踪电路，以及检测电路，用于检测所述活动的预定子集的发生 电路正在产生微量元素。 当检测到该预定活动子集中的活动时，将定时指示添加到微量元素流。 因此，可以通过将跟踪流中添加定时指示的跟踪元素限制到生成微量元素的活动的预定子集，并将有价值的全局或相对定时精度保留在有价值的跟踪带宽中 在跟踪流中表示的那些活动被保留，而不会使跟踪流与时间指示淹没。
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5.发明授权Performing diagnostic operations upon a data processing apparatus with power down support 有权对具有断电支持的数据处理设备执行诊断操作公开(公告)号：US07228457B2
公开(公告)日：2007-06-05
申请号：US10801131
申请日：2004-03-16
IPC分类号： G06F11/00
CPC分类号： G06F11/2236
摘要： A system-on-chip integrated circuit 2 is provided with multiple data processing circuits 4, 6, 8 each with an associated diagnostic interface circuit 16, 18, 20 connected via a diagnostic transaction bus 14 to a diagnostic transaction master circuit 12. The diagnostic master transaction circuit 12 issues diagnostic transaction requests to the diagnostic interface circuits 16, 18, 20. If the associated data processing circuits 4, 6, 8 are powered-down, or otherwise non responsive, then the diagnostic interface circuit 16, 18, 20 returns a diagnostic bus transaction error signal to the diagnostic transaction master circuit 12. A sticky-bit latch 30 within each diagnostic interface circuit 16, 18, 20 serves to record a power-down event and force generation of the diagnostic bus transaction error signal until that sticky bit is cleared by the diagnostic mechanisms. This ensure the diagnostic mechanisms are made aware of the power-down event so they may take any appropriate remedial action that might be necessary as a result of that power-down event.
摘要翻译： 系统级芯片集成电路2具有多个数据处理电路4,6,8，每个数据处理电路具有通过诊断事务总线14连接到诊断事务主电路12的相关联的诊断接口电路16,18,20。 诊断主交易电路12向诊断接口电路16,18,20发出诊断事务请求。 如果相关联的数据处理电路4,6,8被断电或以其他方式不响应，则诊断接口电路16,18,20将诊断总线事务错误信号返回给诊断事务主电路12。 每个诊断接口电路16,18,20内的粘滞锁存器30用于记录诊断总线事务错误信号的掉电事件和强制产生，直到诊断机构清除该粘滞位。 这样可以确保诊断机制能够意识到掉电事件，因此可能会由于断电事件而采取任何必要的补救措施。
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公开(公告)号：US07426659B2
公开(公告)日：2008-09-16
申请号：US11085263
申请日：2005-03-22
IPC分类号： G06F11/00
CPC分类号： G06F11/079 , G06F11/2733
摘要： A data processing system 2 is described having a central processing unit 4 and a diagnostic mechanism 10. The central processing unit 4 is switchable into a power-down mode from which it may resume into a normal operation mode. When the central processing unit 4 resumes into the normal operation mode, execution of program instructions is inhibited by the diagnostic mechanism 10 to allow the diagnostic mechanism to be appropriately programmed such that the immediate power-up code and operations can be properly diagnosed. The requirement to prevent program instruction execution on power-up is programmed by writing to a latch 16 within the diagnostic mechanism 10 prior to the power-down. The prevention of program execution may be achieved, for example, by generation of a halt request or by extending the time period for which the central processing unit 4 is held in reset following power-up.
摘要翻译： 描述了具有中央处理单元4和诊断机构10的数据处理系统2.中央处理单元4可切换到能够恢复到正常操作模式的掉电模式。 当中央处理单元4恢复到正常操作模式时，诊断机构10禁止程序指令的执行，以允许对诊断机构进行适当的编程，使得立即上电代码和操作能被正确诊断。 通过在断电之前写入诊断机构10内的锁存器16来编程防止上电时程序指令执行的要求。 程序执行的防止可以例如通过产生停止请求或通过在上电之后将中央处理单元4保持在复位的时间段来实现。
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公开(公告)号：US20110231461A1
公开(公告)日：2011-09-22
申请号：US12659669
申请日：2010-03-16
IPC分类号： G06F7/00
摘要： A data processing apparatus is provided which is configured to select 2M selected identifiers within a possible range of up to 2N identifiers, where M≦N. The data processing apparatus comprises a selection storage unit configured to store N+1 identifier selection bits, wherein a position of a marker bit in the N+1 identifier selection bits determines M, and an identifier selection unit configured to determine the 2M selected identifiers. The 2M selected identifiers are defined by a base identifier and 2M−1 identifiers incrementally following that base identifier. N−M bits of the N+1 identifier selection bits form N−M most significant bits of the base identifier, and M trailing zeroes form the M least significant bits of the base identifier.
摘要翻译： 提供了一种数据处理装置，其被配置为在最多2N个标识符的可能范围内选择2M个选择的标识符，其中M＆N; E; N。 所述数据处理装置包括：选择存储单元，被配置为存储N + 1个标识符选择位，其中，所述N + 1个标识符选择位中的标记位的位置确定M;以及标识符选择单元，被配置为确定所述2M个选择的标识符。 2M个选择的标识符由基本标识符和逐渐跟随该基本标识符的2M-1个标识符定义。 N + 1标识符选择位的N-M位形成基本标识符的N-M个最高有效位，并且M个尾随零构成基本标识符的M个最低有效位。
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公开(公告)号：US08407529B2
公开(公告)日：2013-03-26
申请号：US13339937
申请日：2011-12-29
申请人： John Michael Horley , Andrew Brookfield Swaine , Thomas Sean Houlihane , Sheldon James Woodhouse , Michael John Williams
发明人： John Michael Horley , Andrew Brookfield Swaine , Thomas Sean Houlihane , Sheldon James Woodhouse , Michael John Williams
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F11/348 , G06F11/3632 , G06F11/3648
摘要： A data processing apparatus having one or more trace data sources. At least one of said trace data sources includes a trace data generator responsive to activity in monitored circuitry to generate trace data representing said activity. A synchronization marker generator is coupled to the trace data generator and operates to generate a synchronization marker and insert the synchronization marker into the trace data stream. A controller is coupled to the synchronization marker generator to generate and insert a synchronization marker into the trace data stream. The controller controls initiation in dependence on behavior of the data processing apparatus downstream of the trace data generator. In this way, the downstream behavior of the data processing apparatus can be made to influence the rate and timing of insertion of synchronization markers into a trace data stream.
摘要翻译： 具有一个或多个跟踪数据源的数据处理装置。 所述跟踪数据源中的至少一个包括跟踪数据发生器，其响应于所监视的电路中的活动以产生表示所述活动的跟踪数据。 同步标记生成器耦合到跟踪数据生成器，并且操作以产生同步标记并将同步标记插入到跟踪数据流中。 控制器耦合到同步标记发生器以产生并将同步标记插入到跟踪数据流中。 控制器根据跟踪数据生成器下游的数据处理设备的行为来控制启动。 以这种方式，可以使数据处理装置的下行行为影响将同步标记插入到跟踪数据流中的速率和时间。
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公开(公告)号：US20090313507A1
公开(公告)日：2009-12-17
申请号：US12155926
申请日：2008-06-11
IPC分类号： G06F11/34
CPC分类号： G06F11/348 , G06F11/3636
摘要： A data processing apparatus is provided having a plurality of processing circuits each having access to a memory. Tracing circuitry is provided for generating a stream of trace data for generating a stream of trace data corresponding to at least one of the plurality of processing circuits. Selection circuitry is provided to enable selective switching of the tracing circuitry from generating a first trace data stream corresponding to a first one of the plurality of processing circuits generating a second different trace data stream corresponding to a different one of the plurality of processing circuits. The selective switching is performed in dependence upon processing state information associating with one or more of the plurality of processing circuits. A corresponding method and computer program product are also provided.
摘要翻译： 提供了一种数据处理装置，其具有各自具有访问存储器的多个处理电路。 跟踪电路被提供用于产生跟踪数据流，用于产生对应于多个处理电路中的至少一个的跟踪数据流。 提供选择电路以使得跟踪电路的选择性切换不产生与多个处理电路中的第一个处理电路相对应的第一跟踪数据流，从而生成对应于多个处理电路中的不同处理电路的第二不同跟踪数据流。 根据与多个处理电路中的一个或多个相关联的处理状态信息执行选择性切换。 还提供了相应的方法和计算机程序产品。
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公开(公告)号：US09223677B2
公开(公告)日：2015-12-29
申请号：US12155926
申请日：2008-06-11
CPC分类号： G06F11/348 , G06F11/3636
摘要： A data processing apparatus is provided having a plurality of processing circuits each having access to a memory. Tracing circuitry is provided for generating a stream of trace data for generating a stream of trace data corresponding to at least one of the plurality of processing circuits. Selection circuitry is provided to enable selective switching of the tracing circuitry from generating a first trace data stream corresponding to a first one of the plurality of processing circuits generating a second different trace data stream corresponding to a different one of the plurality of processing circuits. The selective switching is performed in dependence upon processing state information associating with one or more of the plurality of processing circuits. A corresponding method and computer program product are also provided.
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