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1.
公开(公告)号:US4639664A
公开(公告)日:1987-01-27
申请号:US615979
申请日:1984-05-31
IPC分类号: G01R31/316 , G01R31/319 , G01R31/28 , B07C5/00
CPC分类号: G01R31/31903 , G01R31/316
摘要: In accordance with a broad aspect of the invention, a system is presented for parametrically and functionally testing integrated circuit devices in parallel. At least one integrated circuit device receiving channel is provided for defining a plurality of integrated circuit device test stations therealong, and means are provided for delivering parametric and functional test signals at least functionally in parallel to each of the integrated circuit device test stations. Means are provided at each test station for selectively engaging the integrated circuit devices to apply the parametric and functional test signals to the integrated circuit device at that station, and to selectively isolate the device from the test signals. Means are provided for receiving an output from each test location in response to the test signals, and means for determining from the output the parameters of each tested integrated circuit device. In accordance with the invention, means are provided for sorting the tested integrated circuit devices according to their measured or tested parameters.
摘要翻译: 根据本发明的广泛方面,提出了用于并行地参数地和功能地测试集成电路装置的系统。 提供至少一个集成电路器件接收通道用于在其上定义多个集成电路器件测试站,并且提供用于至少在功能上与每个集成电路器件测试站并行地传递参数和功能测试信号的装置。 在每个测试站处提供装置,用于选择性地接合集成电路装置,以将参数和功能测试信号施加到该站处的集成电路装置,并且选择性地将装置与测试信号隔离。 提供了用于响应于测试信号从每个测试位置接收输出的装置,以及用于从输出确定每个被测集成电路装置的参数的装置。 根据本发明,提供了用于根据其测量或测试的参数对测试的集成电路器件进行分类的装置。