公开(公告)号：US10742278B2

公开(公告)日：2020-08-11

申请号：US15763860

申请日：2015-10-30

Applicant: Apple Inc.

Inventor： Farhana Sheikh ,  Alexios Konstantinos Balatsoukas Stimming

IPC: H04B7/0456 ,  H04B7/0413 ,  H04B7/08 ,  H04L27/26

Abstract: An orthogonalization matrix calculation circuit may include a scaling coefficient calculation circuit configured to calculate a scaling coefficient for each of a plurality of candidate update operations for the orthogonalization matrix, wherein each of the plurality of candidate update operations comprises combining linearly at least one of a first column or a second column of the orthogonalization matrix previously utilized to update the orthogonalization matrix, an update operation selection circuit configured to select an optimum candidate update operation from the plurality of candidate update operations, and a matrix update circuit configured to update the orthogonalization matrix according to the scaling coefficient of the optimum candidate update operation.