公开(公告)号：US20230072903A1

公开(公告)日：2023-03-09

申请号：US17469272

申请日：2021-09-08

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Dmitry Cherniavsky ,  Tim Schoenauer ,  Ali Moaz ,  Rahmi Hezar ,  Ram Kanumalli

IPC: H03K5/1252 ,  G06F13/40 ,  G06F1/08

Abstract: Embodiments relate to updating spur cancellation at a victim integrated circuit (IC) in accordance with dynamic changes in the operating frequencies of an aggressor IC. The aggressor IC changes its operating frequencies at an update time that is determined in advance. The update time and the changes to the operating frequencies are shared with the victim IC. The victim IC dynamically updates the relationships between frequencies of local clock signals for the victim IC and the aggressor IC. The victim IC generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor IC, and configures a spur cancellation circuit. In this way, the victim IC may perform effective spur cancellation despite changes in the operating frequencies of the aggressor IC and deviation of the local clock frequencies.

公开(公告)号：US12003244B2

公开(公告)日：2024-06-04

申请号：US17469272

申请日：2021-09-08

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Dmitry Cherniavsky ,  Tim Schoenauer ,  Ali Moaz ,  Rahmi Hezar ,  Ram Kanumalli

IPC: H04B1/10 ,  G06F1/08 ,  G06F13/40 ,  H03K5/1252

CPC classification number: H03K5/1252 ,  G06F1/08 ,  G06F13/4027

Abstract: Embodiments relate to updating spur cancellation at a victim integrated circuit (IC) in accordance with dynamic changes in the operating frequencies of an aggressor IC. The aggressor IC changes its operating frequencies at an update time that is determined in advance. The update time and the changes to the operating frequencies are shared with the victim IC. The victim IC dynamically updates the relationships between frequencies of local clock signals for the victim IC and the aggressor IC. The victim IC generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor IC, and configures a spur cancellation circuit. In this way, the victim IC may perform effective spur cancellation despite changes in the operating frequencies of the aggressor IC and deviation of the local clock frequencies.