Memory system with improved bus timing calibration
    1.
    发明授权
    Memory system with improved bus timing calibration 有权
    具有改进总线时序校准的存储系统

    公开(公告)号:US09285828B2

    公开(公告)日:2016-03-15

    申请号:US13939588

    申请日:2013-07-11

    Applicant: Apple Inc.

    CPC classification number: G06F1/10 G06F1/08

    Abstract: A method includes communicating between a memory controller and multiple memory devices over an interface that includes at least a control signal and an information signal. For each memory device, a respective individual skew parameter, which is indicative of a timing misalignment between the control signal and the information signal when communicating with that memory device, is produced. The respective individual skew parameter is stored coupled to each memory device. The timing misalignment is corrected at the memory device using the stored individual timing skew.

    Abstract translation: 一种方法包括通过至少包括控制信号和信息信号的接口在存储器控制器和多个存储器件之间进行通信。 对于每个存储器件,产生表示与该存储器件通信时的控制信号和信息信号之间的定时未对准的各自的偏斜参数。 相应的单独偏斜参数被存储耦合到每个存储器件。 使用所存储的单独定时偏移在存储器件中校正定时偏移。

    MEMORY SYSTEM WITH IMPROVED BUS TIMING CALIBRATION
    2.
    发明申请
    MEMORY SYSTEM WITH IMPROVED BUS TIMING CALIBRATION 有权
    具有改进的总线时序校准的存储器系统

    公开(公告)号:US20150019899A1

    公开(公告)日:2015-01-15

    申请号:US13939588

    申请日:2013-07-11

    Applicant: Apple Inc.

    CPC classification number: G06F1/10 G06F1/08

    Abstract: A method includes communicating between a memory controller and multiple memory devices over an interface that includes at least a control signal and an information signal. For each memory device, a respective individual skew parameter, which is indicative of a timing misalignment between the control signal and the information signal when communicating with that memory device, is produced. The respective individual skew parameter is stored coupled to each memory device. The timing misalignment is corrected at the memory device using the stored individual timing skew.

    Abstract translation: 一种方法包括通过至少包括控制信号和信息信号的接口在存储器控制器和多个存储器件之间进行通信。 对于每个存储器件,产生表示与该存储器件通信时的控制信号和信息信号之间的定时未对准的各自的偏斜参数。 相应的单独偏斜参数被存储耦合到每个存储器件。 使用所存储的单独定时偏移在存储器件中校正定时偏移。

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