公开(公告)号：US10552323B1

公开(公告)日：2020-02-04

申请号：US16126812

申请日：2018-09-10

Applicant: Apple Inc.

Inventor： Ronald P. Hall ,  Todd A. Venton ,  Jonathan Y. Tong ,  David E. Kroesche

IPC: G06F12/08 ,  G06F12/0804 ,  G06F12/0891 ,  G06F9/30 ,  G06F9/38 ,  G06F12/0866

Abstract: Various embodiments of a method and apparatus for flushing a cache are disclosed. In a system, a cache memory is accessible by an execution circuit. The execution circuit executes instructions and may utilize data and/or instructions stored in the cache. A flush circuit is also coupled to the cache. Responsive to execution of a power down instruction by the execution circuit, the flush circuit performs a cache flush. If a control state is asserted in a control register, the flush circuit generates a dummy event upon completing the cache flush. Responsive to generating the dummy event, a processor core that includes the execution circuit is inhibited from being powered down.