公开(公告)号：US20250095540A1

公开(公告)日：2025-03-20

申请号：US18815162

申请日：2024-08-26

Applicant: Apple Inc.

Inventor： Vehbi Calayir ,  Weimin Zhang ,  Bret Rothenberg ,  Zhongyuan Ren ,  Fenghua Zheng ,  Mohammad Reza Esmaeili Rad

IPC: G09G3/20

Abstract: A power management integrated circuit (PMIC) of an electronic display may include image data reference voltage adjustment circuitry, a negative supply voltage generator that may generate a negative supply voltage with multiple negative supply voltages, and/or a dedicated timing controller. The image data reference voltage adjustment circuitry may tune image data reference voltages for generating programming voltages based on receiving an indication of an undesired direct current (DC) voltage offset, an undesired alternating current (AC) noise, or both. The image data reference voltage adjustment circuitry may receive the indication from a display panel of the electronic display. The negative supply voltage generator may elevate a voltage of the negative supply voltage to reduce a power consumption of the electronic display. The dedicated timing controller may improve (e.g., reduce length of) a frequency range of one or more switched voltages of the PMIC to reduce front of screen artifacts.