中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

8 records (took 0.013 seconds)

    Electronic Devices with Displays for Mitigating Cathode Noise
    2.
    发明申请
    Electronic Devices with Displays for Mitigating Cathode Noise 有权

    公开(公告)号：US20230081342A1

    公开(公告)日：2023-03-16

    申请号：US17859835

    申请日：2022-07-07

    Applicant: Apple Inc.

    Inventor： Chin-Wei Lin ,  Aida R Colon-Berrios ,  Fan Gui ,  Levent Erdal Aygun ,  Mohammad Reza Esmaeili Rad ,  Ran Tu ,  Xin Lin ,  Yun Wang

    IPC: G09G3/3233 ,  H01L27/32

    Abstract: A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor coupled in series with an isolation transistor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations. During a data refresh, the isolation transistor can be turned on to provide current boosting. During emission periods, the isolation transistor is turned off to prevent cathode noise from potentially coupling through to one or more direct-current voltage nodes in the pixel.

    REDUCED POWER DISPLAY POWER MANAGEMENT INTEGRATED CIRCUIT
    3.
    发明申请
    REDUCED POWER DISPLAY POWER MANAGEMENT INTEGRATED CIRCUIT 有权

    公开(公告)号：US20250095540A1

    公开(公告)日：2025-03-20

    申请号：US18815162

    申请日：2024-08-26

    Applicant: Apple Inc.

    Inventor： Vehbi Calayir ,  Weimin Zhang ,  Bret Rothenberg ,  Zhongyuan Ren ,  Fenghua Zheng ,  Mohammad Reza Esmaeili Rad

    IPC: G09G3/20

    Abstract: A power management integrated circuit (PMIC) of an electronic display may include image data reference voltage adjustment circuitry, a negative supply voltage generator that may generate a negative supply voltage with multiple negative supply voltages, and/or a dedicated timing controller. The image data reference voltage adjustment circuitry may tune image data reference voltages for generating programming voltages based on receiving an indication of an undesired direct current (DC) voltage offset, an undesired alternating current (AC) noise, or both. The image data reference voltage adjustment circuitry may receive the indication from a display panel of the electronic display. The negative supply voltage generator may elevate a voltage of the negative supply voltage to reduce a power consumption of the electronic display. The dedicated timing controller may improve (e.g., reduce length of) a frequency range of one or more switched voltages of the PMIC to reduce front of screen artifacts.

    High Frame Rate Display
    5.
    发明申请
    High Frame Rate Display 审中-公开

    公开(公告)号：US20190088207A1

    公开(公告)日：2019-03-21

    申请号：US16134802

    申请日：2018-09-18

    Applicant: Apple Inc.

    Inventor： Chin-Wei Lin ,  Majid Gharghi ,  Mohammad Reza Esmaeili Rad ,  Yun Wang ,  Jie Won Ryu ,  Kingsuk Brahma ,  Shingo Hatanaka ,  Shinya Ono ,  Ting-Kuo Chang

    IPC: G09G3/3266 ,  G09G3/3233

    Abstract: A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

Patent Agency Ranking