公开(公告)号：US09106575B2

公开(公告)日：2015-08-11

申请号：US13756222

申请日：2013-01-31

Applicant: Apple Inc.

Inventor： Thomas J. Wilson ,  Yutaka Hori

IPC: H04L12/56 ,  H04L12/935 ,  H04L12/931

CPC classification number: H04L49/30 ,  G06F13/40 ,  H04L49/00

Abstract: An integrated circuit with two operating modes is described. During a first operating mode, a de-multiplexer selectively couples information received via a common set of pads to first control logic, which decodes the information based on a first serial-interface technique. Moreover, during a second operating mode, the de-multiplexer selectively couples a first portion of the information to the first control logic and a second portion of the information to second control logic, which decodes the second portion based on a second serial-interface technique. By facilitating time-domain de-multiplexing of two similar serial-interface techniques, the integrated circuit can overcome the constraints imposed by a low or limited pin count.

Abstract translation: 描述具有两种工作模式的集成电路。 在第一操作模式期间，解复用器选择性地将经由公共焊盘组接收的信息耦合到第一控制逻辑，第一控制逻辑基于第一串行接口技术对信息进行解码。 此外，在第二操作模式期间，解复用器选择性地将信息的第一部分耦合到第一控制逻辑，并将信息的第二部分耦合到第二控制逻辑，第二控制逻辑基于第二串行接口技术来解码第二部分 。 通过促进两种类似的串行接口技术的时域解复用，集成电路可以克服由低或有限的引脚数所施加的限制。

公开(公告)号：US20140211817A1

公开(公告)日：2014-07-31

申请号：US13756222

申请日：2013-01-31

Applicant: APPLE, INC.

Inventor： Thomas J. Wilson ,  Yutaka Hori

IPC: H04L12/56

CPC classification number: H04L49/30 ,  G06F13/40 ,  H04L49/00

Abstract: An integrated circuit with two operating modes is described. During a first operating mode, a de-multiplexer selectively couples information received via a common set of pads to first control logic, which decodes the information based on a first serial-interface technique. Moreover, during a second operating mode, the de-multiplexer selectively couples a first portion of the information to the first control logic and a second portion of the information to second control logic, which decodes the second portion based on a second serial-interface technique. By facilitating time-domain de-multiplexing of two similar serial-interface techniques, the integrated circuit can overcome the constraints imposed by a low or limited pin count.

Abstract translation: 描述具有两种工作模式的集成电路。 在第一操作模式期间，解复用器选择性地将经由公共焊盘组接收的信息耦合到第一控制逻辑，第一控制逻辑基于第一串行接口技术对信息进行解码。 此外，在第二操作模式期间，解复用器选择性地将信息的第一部分耦合到第一控制逻辑，并将信息的第二部分耦合到第二控制逻辑，第二控制逻辑基于第二串行接口技术来解码第二部分 。 通过促进两种类似的串行接口技术的时域解复用，集成电路可以克服由低或有限的引脚数所施加的限制。