公开(公告)号：US20020058408A1

公开(公告)日：2002-05-16

申请号：US10043422

申请日：2002-01-10

Applicant: Applied Materials, Inc.

Inventor： Dan Maydan ,  Ashok K. Sinha ,  Zheng Xu ,  Liang-Yuh Chen ,  Roderick Craig Mosely ,  Daniel Carl ,  Diana Xiaobing Ma ,  Yan Ye ,  Wen Chiang Tu

IPC: H01L021/4763

CPC classification number: H01L21/76885 ,  H01L21/32136 ,  H01L21/76834

Abstract: The present invention provides a method and apparatus for forming reliable interconnects in which the overlap of the line over the plug or via is minimized or eliminated. In one aspect, a barrier plug comprised of a conductive material, such as tungsten, is deposited over the via to provide an etch stop during line etching and to prevent diffusion of the metal, such as copper, into the surrounding dielectric material if the line is misaligned over the via. Additionally, the barrier plug prevents an overall reduction in resistance of the interconnect and enables reactive ion etching to be employed to form the metal line. In another aspect, reactive ion etching techniques are employed to selectively etch the metal line and the barrier layer to provide a controlled etching process which exhibits selectivity for the metal line, then the barrier and then the via or plug.