公开(公告)号：US20220238674A1

公开(公告)日：2022-07-28

申请号：US17155662

申请日：2021-01-22

Applicant: Applied Materials, Inc.

Inventor： Qintao ZHANG ,  Samphy HONG ,  Lei ZHONG ,  David Jon LEE ,  Felix LEVITOV ,  Carlos CABALLERO ,  Durgaprasad CHATURVEDULA

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66

Abstract: A method of forming a gate of a planar metal oxide semiconductor field effect transistor (MOSFET) reduces gate-drain capacitance. The method may include forming a first gate dielectric portion of the planar MOSFET with a first thickness that is configured to reduce the gate-drain capacitance of the planar MOSFET, forming a second gate dielectric portion of the planar MOSFET on the substrate with a second thickness less than the first thickness, and forming the gate of the planar MOSFET on the first gate dielectric portion and the second gate dielectric portion on the substrate.