公开(公告)号：US20240412997A1

公开(公告)日：2024-12-12

申请号：US18391503

申请日：2023-12-20

Applicant: Applied Materials, Inc.

Inventor： Michael Lee SWEARS ,  Santosh Kumar DHULAPATI ,  James R. MCLANE

IPC: H01L21/68 ,  H01L21/67

Abstract: Disclosed herein are approaches for in-situ verification and correction of a wafer position. In one approach, a method may include illuminating an underside of a platen positioned within a processing chamber, and detecting a perimeter edge of the platen using an imaging device positioned external to the processing chamber, above the platen. The method may further include determining, via a controller, position data for the platen based on the detected perimeter edge of the platen, and positioning a wafer atop the platen based on the position data of the platen, wherein the wafer comprises a positioning notch. The method may further include detecting a position of the wafer and a position of the positioning notch using the imaging device, and comparing the position data of the platen to the detected position of the wafer and comparing the detected position of the positioning notch to an expected notch position