公开(公告)号：US20220068661A1

公开(公告)日：2022-03-03

申请号：US17389119

申请日：2021-07-29

Applicant: Applied Materials, Inc.

Inventor： Jonathan SHAW ,  Priyadarshi PANDA ,  Nancy FUNG ,  Yongchang DONG ,  Somaye RASOULI ,  Gene LEE

IPC: H01L21/3213

Abstract: A method of patterning a substrate is provided. The method includes modifying a surface of a metal-containing layer formed over a substrate positioned in a processing region of a processing chamber by exposing the surface of the metal-containing layer to plasma effluents of a chlorine-containing gas precursor and an oxygen-containing gas precursor to form a modified surface of the metal-containing layer. The method further includes directing plasma effluents of an inert gas precursor towards the modified surface of the metal-containing layer. The plasma effluents of the inert gas precursor are directed by applying a bias voltage to a substrate support holding the substrate. The method further includes anisotropically etching the modified surface of the metal-containing layer with the plasma effluents of the inert gas precursor to form a first recess having a first sidewall in the metal-containing layer.

公开(公告)号：US20210066309A1

公开(公告)日：2021-03-04

申请号：US17096099

申请日：2020-11-12

Applicant: Applied Materials, Inc.

Inventor： Priyadarshi PANDA ,  In Seok HWANG

IPC: H01L27/108 ,  H01L21/285 ,  H01L21/768 ,  C23C28/00

Abstract: A process of smoothing a top surface of a bit line metal of a memory structure to decrease resistance of a bit line stack. The process includes depositing titanium layer of approximately 30 angstroms to 50 angstroms on polysilicon layer on a substrate, depositing first titanium nitride layer of approximately 15 angstroms to approximately 40 angstroms on titanium layer, annealing substrate at a temperature of approximately 700 degrees Celsius to approximately 850 degrees Celsius, depositing second titanium nitride layer of approximately 15 angstroms to approximately 40 angstroms on first titanium nitride layer after annealing, depositing a bit line metal layer of ruthenium on second titanium nitride layer, annealing bit line metal layer at temperature of approximately 550 degrees to approximately 650 degrees, and soaking bit line metal layer in hydrogen-based ambient for approximately 3 minutes to approximately 6 minutes during annealing.

公开(公告)号：US20200051994A1

公开(公告)日：2020-02-13

申请号：US16150652

申请日：2018-10-03

Applicant: Applied Materials, Inc.

Inventor： Vinod Robert PURAYATH ,  Priyadarshi PANDA ,  Abhijit MALLICK ,  Srinivas GANDIKOTA

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11524 ,  H01L27/11556

Abstract: A method of forming a memory device including a plurality of nonvolatile memory cells is provided. The method includes forming a hole in a stack of alternating insulator layers and memory cell layers. The stack extends from a bottom to a top, and the stack includes a plurality of insulator layers and plurality of memory cell layers. The method further includes depositing a first portion of a silicon channel layer. The first portion of the silicon channel layer extends from the bottom of the stack to the top of the stack. The method further includes adding a dopant layer over the first portion of the silicon channel layer. The dopant layer includes a first dopant. The method further includes depositing a second portion of the silicon channel layer. The second portion of the silicon channel layer extends from the bottom of the stack to the top of the stack.