公开(公告)号：US11900522B2

公开(公告)日：2024-02-13

申请号：US17821666

申请日：2022-08-23

Applicant: Arm Limited

Inventor： Isidoros Sideris ,  Péter Sonkoly ,  Adrian Pereiro Castro

IPC: G06T15/00 ,  G06F9/38

CPC classification number: G06T15/005 ,  G06F9/3887

Abstract: Disclosed is a method of handling thread termination events within a graphics processor when a group of plural execution lanes are executing in a co-operative state. When a group of lanes is in the co-operative state, in response to the graphics processor encountering an event that means that a subset of one or more execution threads associated with the group of execution lanes in the co-operative state should be terminated: it is determined whether a condition to immediately terminate the subset of one or more execution threads is met. When the condition is not met, the group of execution lanes continue their execution in the co-operative state, but a record is stored to track that the threads in the subset of one or more execution threads should subsequently be terminated.