公开(公告)号：US11521703B2

公开(公告)日：2022-12-06

申请号：US17218927

申请日：2021-03-31

Applicant: Arm Limited

Inventor： Amandeep Kaur ,  Andy Wangkun Chen ,  Penaka Phani Goberu ,  Khushal Gelda

IPC: G11C29/00 ,  G11C29/44 ,  G01R31/3193

Abstract: Various implementations described herein are related to a method for identifying multi-bank memory architecture having multiple banks including a first bank and a second bank. The method may receive a faulty row address having a faulty bank selection bit, and also, the method may select the first bank or the second bank for row redundancy operations based on the faulty bank selection bit.

公开(公告)号：US20220319632A1

公开(公告)日：2022-10-06

申请号：US17218927

申请日：2021-03-31

Applicant: Arm Limited

Inventor： Amandeep Kaur ,  Andy Wangkun Chen ,  Penaka Phani Goberu ,  Khushal Gelda

IPC: G11C29/00 ,  G01R31/3193 ,  G11C29/44

Abstract: Various implementations described herein are related to a method for identifying multi-bank memory architecture having multiple banks including a first bank and a second bank. The method may receive a faulty row address having a faulty bank selection bit, and also, the method may select the first bank or the second bank for row redundancy operations based on the faulty bank selection bit.