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公开(公告)号:US20250110747A1
公开(公告)日:2025-04-03
申请号:US18478345
申请日:2023-09-29
Applicant: Arm Limited
Inventor: Maochang Dang , Andreas Danner Nilsen , Mark Underwood , Brian Gordon Pearson , Espen Amodt , Xinyu Chen
Abstract: A method of preparing a command stream for a parallel processor, comprising: analysing the command stream to detect at least a first dependency; generating at least one timeline dependency point responsive to detecting the first dependency; determining a latest action for the first dependency to derive a completion stream timeline point for the first dependency; comparing the completion stream timeline point for the first dependency with a completion stream timeline point for a second dependency to determine a latest stream timeline point; generating at least one command stream synchronization control instruction according to the latest stream timeline point; and providing the command stream and the at least one command stream synchronization control instruction to an execution unit of the parallel processor.
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公开(公告)号:US20240168804A1
公开(公告)日:2024-05-23
申请号:US18491104
申请日:2023-10-20
Applicant: Arm Limited
Inventor: Maochang Dang , Andreas Due Engh-Halstvedt , Andreas Danner Nilsen , Brian Gordon Pearson , Espen Amodt
CPC classification number: G06F9/5005 , G06F9/54 , G06T1/60
Abstract: The present disclosure relates to a processing resource for a graphics processing system for performing graphics processing for an application executing on a host processor of the graphics processing system according to a command stream, the command stream being generated by the host processor in response to an API call from the application, the processing resource comprising: a control circuit configured to execute commands from the command stream, wherein the command stream comprises one or more commands relating to a processing task and one or more commands relating to at least one state group associated with the processing task; at least one processing circuit configured to perform processing tasks; a shadow state storage module configured for use by the control circuit to store state information; and a processing state storage module configured for use by the processing circuit to store state information, wherein the control circuit is configured to determine one or more changed states within the at least one state group with respect to a preceding API call, to write state information comprising the one or more changed states to the shadow state storage module, and to assign the processing task to the at least one processing circuit and execute an instruction to transmit the state information from the shadow state storage module to the processing state storage module.
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