公开(公告)号：US11579920B2

公开(公告)日：2023-02-14

申请号：US16934355

申请日：2020-07-21

Applicant: Arm Limited

Inventor： Timothy Nicholas Hay ,  Nathan William Whitaker ,  Haralds Capkevics

IPC: G06F9/48 ,  G06F9/455 ,  G06F9/50

Abstract: An apparatus comprises an interrupt distributor to distribute virtual interrupts to one or more physical processors, each virtual interrupt to be handled by one of a plurality of virtual processors mappable to said one or more physical processors; and control circuitry to maintain virtual processor interrupt tracking information corresponding to a given virtual processor. The virtual processor interrupt tracking information includes a pending interrupt record tracking which types of virtual interrupts are pending for the given virtual processor, and separate from the pending interrupt record, a pending interrupt status indication indicating a pending interrupt status for the given virtual processor. The pending interrupt status indicates whether the number of pending virtual interrupts for the given virtual processor is zero.

公开(公告)号：US11327786B2

公开(公告)日：2022-05-10

申请号：US16934353

申请日：2020-07-21

Applicant: Arm Limited

Inventor： Timothy Nicholas Hay ,  Haralds Capkevics

IPC: G06F9/48 ,  G06F9/455 ,  G06F9/50 ,  G06F13/24

Abstract: Virtual processors are mappable to a number of physical processors. An interrupt distributor is responsible for distributing interrupt requests to a subset of the physical processors. An interface communicates with further interrupt distributors responsible for other physical processors. In response to an interrupt request to be handled by a target virtual processor, the interrupt distributor determines, based on cached virtual processor mapping information, whether to route the interrupt request to one of the subset of physical processors or to one of the further interrupt distributors. When a rejection response is received in response to an interrupt request routed to one of the further interrupt distributors, an update of the cached virtual processing mapping information is requested based on shared virtual processor mapping information, and a resent interrupt request is sent to a further interrupt distributor determined based on the shared virtual processor mapping information.

公开(公告)号：US20240089042A1

公开(公告)日：2024-03-14

申请号：US18459625

申请日：2023-09-01

Applicant: Arm Limited

Inventor： Haralds Capkevics ,  Timothy Nicholas Hay

IPC: H04L5/00 ,  H04L49/90

CPC classification number: H04L5/0044 ,  H04L49/90

Abstract: Data communication apparatus comprises a receiver comprising message receiver circuitry to receive payload messages and sender control messages from message sender circuitry, the message receiver circuitry comprising: communication circuitry to send receiver control messages to the message sender circuitry, the receiver control messages relating to actions by the message receiver circuitry in response to payload messages or sender control messages from the message sender circuitry; in which the communication circuitry is configured to selectively associate a respective indication with at least some of the receiver control messages sent to the message sender circuitry, the indication indicating whether a given receiver control message with which the indication is associated is a first receiver control message sent by the communication circuitry to the message sender circuitry after a reset of circuitry in the receiver.