公开(公告)号：US12026515B2

公开(公告)日：2024-07-02

申请号：US17959556

申请日：2022-10-04

Applicant: Arm Limited

Inventor： William Elton Burky ,  Nicholas Andrew Plante ,  Alexander Cole Shulyak ,  Joshua David Knebel ,  Yasuo Ishii

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30145 ,  G06F9/30181 ,  G06F9/3856

Abstract: A data processing apparatus includes detection circuitry that detects a parent instruction and a child instruction from a stream of instructions. The parent instruction references a destination register that is referenced as a source register by the child instruction. Adjustment circuitry then adjusts the child instruction to produce an adjusted child instruction whose behaviour is logically equivalent to a behaviour of executing the parent instruction followed by the child instruction.