HANDLING LOAD-EXCLUSIVE INSTRUCTIONS IN APPARATUS HAVING SUPPORT FOR TRANSACTIONAL MEMORY

    公开(公告)号:US20210342152A1

    公开(公告)日:2021-11-04

    申请号:US17255001

    申请日:2019-05-09

    Applicant: Arm Limited

    Abstract: An apparatus is described with support for transactional memory and load/store-exclusive instructions using an exclusive monitor indication to track exclusive access to a given address. In response to a predetermined type of load instruction specifying a load target address, which is executed within a given transaction, any exclusive monitor indication previously set for the load target address is cleared. In response to a load-exclusive instruction, an abort is triggered for a transaction for which the given address is specified as one of its working set of addresses. This helps to maintain mutual exclusion between transactional and non-transactional threads even if there is load speculation in the non-transactional thread.

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