公开(公告)号：US11967365B2

公开(公告)日：2024-04-23

申请号：US16898401

申请日：2020-06-10

Applicant: Arm Limited

Inventor： Yew Keong Chong ,  Bikas Maiti ,  Venu Anantuni ,  Martin Jay Kinkade

IPC: G11C11/412 ,  G11C11/419

CPC classification number: G11C11/412 ,  G11C11/419

Abstract: Various implementations described herein are related to a device having a memory cell with logic that is configured to store data and passgates that are configured to access the data stored in the logic. The device may include a first number of input-output ports that are time-multiplexed with the passgates so as to increase the first number of input-output ports to a second number of input-output ports that is greater than the first number of input-output ports.