摘要:
Provided are techniques for writing doorbell information. In accordance with certain techniques, one or more protection domains are created. One or more data structures are created, wherein each of the data structures is associated with at least one protection domain. One of the data structures is updated. A doorbell structure address for a doorbell structure associated with the updated data structure is computed. Doorbell information is written at the computed doorbell structure address. In accordance with certain other techniques, doorbell information is received. A doorbell structure address is decoded from the doorbell information. A first protection domain identifier is determined from the doorbell structure address. A resource context of a data structure is determined from the doorbell information. The resource context at the doorbell address is read to determine a second protection domain identifier. The first protection domain identifier and the second protection domain identifier are compared to determine whether to update the resource context of the doorbell structure. Other embodiments are described and claimed.
摘要:
Provided are a method, system, and program for translating virtual addresses of memory locations within pages of different sizes. In one embodiment, a translation entry containing a physical address is stored in a data structure table for each page. Each virtual address includes a page virtual address which identifies the translation entry containing the physical address of the page containing the memory location. The virtual address may be translated to a translation entry index using the size of the page containing the memory location.
摘要:
Provided are a method, system, and program for updating a cache in which, in one aspect of the description provided herein, changes to data structure entries in the cache are selectively written back to the source data structure table maintained in the host memory. In one embodiment, translation and protection table (TPT) contents of an identified cache entry are written to a source TPT in host memory as a function of an identified state transition of the cache entry in connection with a memory operation and the memory operation. Other embodiments are described and claimed.
摘要:
In one embodiment, a method is provided. The method of this embodiment provides determining if a management queue can be created, and if a management queue can be created, allocating virtually contiguous memory to a management queue associated with a device, registering the management queue, and creating a management queue context.
摘要:
Provided are a method, system, and program for caching a virtualized data structure table. In one embodiment, an input/output (I/O) device has a cache subsystem for a data structure table which has been virtualized. As a consequence, the data structure table cache may be addressed using a virtual address or index. For example, a network adapter may maintain an address translation and protection table (TPT) which has virtually contiguous data structures but not necessarily physically contiguous data structures in system memory. TPT entries may be stored in a cache and addressed using a virtual address or index. Mapping tables may be stored in the cache as well and addressed using a virtual address or index.
摘要:
Provided are a method, system, and program for managing data transmission from a source to a destination through a network. The destination imposes a window value on the source which limits the quantity of data packets which can be sent from the source to the destination without receiving an acknowledgment of being received by the destination. In one embodiment, the source imposes a second window value, smaller than the destination window value, which limits even further the quantity of data packets which can be sent from the source to the destination without receiving an acknowledgment of being received by the destination. In another embodiment, a plurality of direct memory access connections are established between the source and a plurality of specified memory locations of a plurality of destinations. The source imposes a plurality of message limits, each message limit imposing a separate limit for each direct memory access connection on the quantity of messages sent from the source to the specified memory location of the direct memory access connection associated with the message limit and lacking a message acknowledgment of being received by the destination of the direct memory access connection associated with the message limit.