公开(公告)号：US10783279B2

公开(公告)日：2020-09-22

申请号：US15679134

申请日：2017-08-16

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Martin Olsson ,  Arne Aas

IPC: G06F21/72 ,  H04L9/06

Abstract: A low-cost cryptographic accelerator is disclosed that accelerates inner loops of a cryptographic process. The cryptographic accelerator performs operations on cryptographic data provided by a central processing unit (CPU) running a software cryptographic process to create a combined hardware and software cryptographic process, resulting in a lower cost secure communication solution than software-only or hardware-only cryptographic processes. In an embodiment, a cryptographic accelerator comprises: an interface configured to receive cryptographic data, the cryptographic data indicating a particular cryptographic process to be performed on the cryptographic data; transformation logic configured to perform a cryptographic operation on the cryptographic data according to the cryptographic process, the transformation logic including logic for performing cryptographic operations for a plurality of different cryptographic processes; and a state register configured for storing a result of the cryptographic operation.

公开(公告)号：US10025423B2

公开(公告)日：2018-07-17

申请号：US15138152

申请日：2016-04-25

Applicant: Atmel Corporation

Inventor： Arne Aas ,  Torbjorn Viksand

IPC: G06F3/041 ,  G06F3/044

Abstract: In an embodiment, a circuit comprises: an analog driver operable to drive a sensor voltage on a capacitive sensor; a digital driver; a shield drive control coupled to the analog driver and the digital driver, the shield drive control operable to: during a one or more phases of a capacitive measurement of the capacitive sensor, disable the analog driver and enable the digital driver to drive a driven shield; and during one or more other phases of a capacitive measurement of the capacitive sensor, disable the digital driver and enable the analog driver to drive the driven shield with a driven shield voltage that replicates the sensor voltage.

公开(公告)号：US11841981B2

公开(公告)日：2023-12-12

申请号：US16948480

申请日：2020-09-21

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Martin Olsson ,  Arne Aas

IPC: H04L9/06 ,  G06F21/72

CPC classification number: G06F21/72 ,  H04L9/06 ,  H04L9/0631 ,  H04L9/0643 ,  H04L2209/12

Abstract: A low-cost cryptographic accelerator is disclosed that accelerates inner loops of a cryptographic process. The cryptographic accelerator performs operations on cryptographic data provided by a central processing unit (CPU) running a software cryptographic process to create a combined hardware and software cryptographic process, resulting in a lower cost secure communication solution than software-only or hardware-only cryptographic processes. In an embodiment, a cryptographic accelerator comprises: an interface configured to receive cryptographic data, the cryptographic data indicating a particular cryptographic process to be performed on the cryptographic data; transformation logic configured to perform a cryptographic operation on the cryptographic data according to the cryptographic process, the transformation logic including logic for performing cryptographic operations for a plurality of different cryptographic processes; and a state register configured for storing a result of the cryptographic operation.

公开(公告)号：US20180089467A1

公开(公告)日：2018-03-29

申请号：US15679134

申请日：2017-08-16

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Martin Olsson ,  Arne Aas

IPC: G06F21/72 ,  H04L9/06

Abstract: A low-cost cryptographic accelerator is disclosed that accelerates inner loops of a cryptographic process. The cryptographic accelerator performs operations on cryptographic data provided by a central processing unit (CPU) running a software cryptographic process to create a combined hardware and software cryptographic process, resulting in a lower cost secure communication solution than software-only or hardware-only cryptographic processes. In an embodiment, a cryptographic accelerator comprises: an interface configured to receive cryptographic data, the cryptographic data indicating a particular cryptographic process to be performed on the cryptographic data; transformation logic configured to perform a cryptographic operation on the cryptographic data according to the cryptographic process, the transformation logic including logic for performing cryptographic operations for a plurality of different cryptographic processes; and a state register configured for storing a result of the cryptographic operation.

公开(公告)号：US20170308219A1

公开(公告)日：2017-10-26

申请号：US15138152

申请日：2016-04-25

Applicant: Atmel Corporation

Inventor： Arne Aas ,  Torbjorn Viksand

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0416 ,  G06F3/044 ,  G06F2203/04107

Abstract: In an embodiment, a circuit comprises: an analog driver operable to drive a sensor voltage on a capacitive sensor; a digital driver; a shield drive control coupled to the analog driver and the digital driver, the shield drive control operable to: during a one or more phases of a capacitive measurement of the capacitive sensor, disable the analog driver and enable the digital driver to drive a driven shield; and during one or more other phases of a capacitive measurement of the capacitive sensor, disable the digital driver and enable the analog driver to drive the driven shield with a driven shield voltage that replicates the sensor voltage.