公开(公告)号：US11841981B2

公开(公告)日：2023-12-12

申请号：US16948480

申请日：2020-09-21

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Martin Olsson ,  Arne Aas

IPC: H04L9/06 ,  G06F21/72

CPC classification number: G06F21/72 ,  H04L9/06 ,  H04L9/0631 ,  H04L9/0643 ,  H04L2209/12

Abstract: A low-cost cryptographic accelerator is disclosed that accelerates inner loops of a cryptographic process. The cryptographic accelerator performs operations on cryptographic data provided by a central processing unit (CPU) running a software cryptographic process to create a combined hardware and software cryptographic process, resulting in a lower cost secure communication solution than software-only or hardware-only cryptographic processes. In an embodiment, a cryptographic accelerator comprises: an interface configured to receive cryptographic data, the cryptographic data indicating a particular cryptographic process to be performed on the cryptographic data; transformation logic configured to perform a cryptographic operation on the cryptographic data according to the cryptographic process, the transformation logic including logic for performing cryptographic operations for a plurality of different cryptographic processes; and a state register configured for storing a result of the cryptographic operation.

公开(公告)号：US10073661B2

公开(公告)日：2018-09-11

申请号：US15385810

申请日：2016-12-20

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Ian Fullerton ,  Joseph Martinez ,  Martin Olsson

IPC: G11C8/00 ,  G06F3/06

CPC classification number: G06F3/0679 ,  G06F3/062 ,  G06F3/0655 ,  G06F12/0246 ,  G06F21/6218 ,  G06F2212/1052 ,  G06F2212/72 ,  G06F2212/7201

Abstract: The disclosed embodiments provide security extensions for memory (e.g., non-volatile memory) by means of address and data scrambling and differential data storage to minimize exposure to side channel attacks and obfuscate the stored data. The scrambling function maximizes reverse engineering costs when recovering sequences of secret keys.

公开(公告)号：US20180089467A1

公开(公告)日：2018-03-29

申请号：US15679134

申请日：2017-08-16

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Martin Olsson ,  Arne Aas

IPC: G06F21/72 ,  H04L9/06

Abstract: A low-cost cryptographic accelerator is disclosed that accelerates inner loops of a cryptographic process. The cryptographic accelerator performs operations on cryptographic data provided by a central processing unit (CPU) running a software cryptographic process to create a combined hardware and software cryptographic process, resulting in a lower cost secure communication solution than software-only or hardware-only cryptographic processes. In an embodiment, a cryptographic accelerator comprises: an interface configured to receive cryptographic data, the cryptographic data indicating a particular cryptographic process to be performed on the cryptographic data; transformation logic configured to perform a cryptographic operation on the cryptographic data according to the cryptographic process, the transformation logic including logic for performing cryptographic operations for a plurality of different cryptographic processes; and a state register configured for storing a result of the cryptographic operation.

公开(公告)号：US10783279B2

公开(公告)日：2020-09-22

申请号：US15679134

申请日：2017-08-16

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Martin Olsson ,  Arne Aas

IPC: G06F21/72 ,  H04L9/06

Abstract: A low-cost cryptographic accelerator is disclosed that accelerates inner loops of a cryptographic process. The cryptographic accelerator performs operations on cryptographic data provided by a central processing unit (CPU) running a software cryptographic process to create a combined hardware and software cryptographic process, resulting in a lower cost secure communication solution than software-only or hardware-only cryptographic processes. In an embodiment, a cryptographic accelerator comprises: an interface configured to receive cryptographic data, the cryptographic data indicating a particular cryptographic process to be performed on the cryptographic data; transformation logic configured to perform a cryptographic operation on the cryptographic data according to the cryptographic process, the transformation logic including logic for performing cryptographic operations for a plurality of different cryptographic processes; and a state register configured for storing a result of the cryptographic operation.

公开(公告)号：US20180024781A1

公开(公告)日：2018-01-25

申请号：US15385810

申请日：2016-12-20

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Ian Fullerton ,  Joseph Martinez ,  Martin Olsson

IPC: G06F3/06

CPC classification number: G06F3/0679 ,  G06F3/062 ,  G06F3/0655 ,  G06F12/0246 ,  G06F2212/1052 ,  G06F2212/72 ,  G06F2212/7201

Abstract: The disclosed embodiments provide security extensions for memory (e.g., non-volatile memory) by means of address and data scrambling and differential data storage to minimize exposure to side channel attacks and obfuscate the stored data. The scrambling function maximizes reverse engineering costs when recovering sequences of secret keys.