公开(公告)号：US20140313467A1

公开(公告)日：2014-10-23

申请号：US14320660

申请日：2014-07-01

Applicant: Au Optronics Corporation

Inventor： Hsiao-Wei Cheng ,  Sung-Hui Lin ,  Ming-Yung Huang ,  Pin-Miao Liu ,  Wen-Shin Wu ,  Chun-Yao Huang ,  Wei-Sheng Yu

IPC: G02F1/1362

CPC classification number: G02F1/136213

Abstract: A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.

Abstract translation: 提供了包括扫描线，数据线，有源器件，像素电极，电容器电极线，半导体图案层和至少一个电介质层的像素结构。 有源器件电连接到扫描线和数据线。 像素电极电连接到有源器件。 电容器电极线位于像素电极下方。 在电容器电极线和像素电极之间形成第一存储电容器。 半导体图案层设置在电容器电极线和像素电极之间，像素电极电连接到半导体图案层。 在半导体图案层和电容器电极线之间形成第二存储电容器。 电介质层配置在电容电极线与像素电极之间，位于半导电图案层与电容电极线之间。

公开(公告)号：US09046726B2

公开(公告)日：2015-06-02

申请号：US14320660

申请日：2014-07-01

Applicant: Au Optronics Corporation

Inventor： Hsiao-Wei Cheng ,  Sung-Hui Lin ,  Ming-Yung Huang ,  Pin-Miao Liu ,  Wen-Shin Wu ,  Chun-Yao Huang ,  Wei-Sheng Yu

IPC: G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/136213

Abstract: A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.

Abstract translation: 提供了包括扫描线，数据线，有源器件，像素电极，电容器电极线，半导体图案层和至少一个电介质层的像素结构。 有源器件电连接到扫描线和数据线。 像素电极电连接到有源器件。 电容器电极线位于像素电极下方。 在电容器电极线和像素电极之间形成第一存储电容器。 半导体图案层设置在电容器电极线和像素电极之间，像素电极电连接到半导体图案层。 在半导体图案层和电容器电极线之间形成第二存储电容器。 电介质层配置在电容电极线与像素电极之间，位于半导电图案层与电容电极线之间。

公开(公告)号：US09025098B2

公开(公告)日：2015-05-05

申请号：US14320657

申请日：2014-07-01

Applicant: Au Optronics Corporation

Inventor： Hsiao-Wei Cheng ,  Sung-Hui Lin ,  Ming-Yung Huang ,  Pin-Miao Liu ,  Wen-Shin Wu ,  Chun-Yao Huang ,  Wei-Sheng Yu

IPC: G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/136213

Abstract: A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.

公开(公告)号：US20140313466A1

公开(公告)日：2014-10-23

申请号：US14320657

申请日：2014-07-01

Applicant: Au Optronics Corporation

Inventor： Hsiao-Wei Cheng ,  Sung-Hui Lin ,  Ming-Yung Huang ,  Pin-Miao Liu ,  Wen-Shin Wu ,  Chun-Yao Huang ,  Wei-Sheng Yu

IPC: G02F1/1362

CPC classification number: G02F1/136213

Abstract: A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.