专利检索 ap:("Avago Technologies International Sales Pte. Limited") AND inv:"Adam Benjamin Healey" 第 1 页

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发明授权
Efficient architecture for high-performance DSP-based SERDES 有权

公开(公告)号：US11689395B2

公开(公告)日：2023-06-27

申请号：US17499826

申请日：2021-10-12

申请人： Avago Technologies International Sales Pte. Limited

发明人： Magesh Valliappan , Adam Benjamin Healey

IPC分类号： H04L25/03 , H03M1/34 , H03M1/10

CPC分类号： H04L25/03343 , H03M1/1009 , H03M1/34 , H04L25/03267 , H04L2025/03477

摘要： A digital signal processing (DSP) device includes a first fitter to equalize channel dispersion associated with signal transmission through a medium, a second filter to cancel channel reflections, and a third filter to at least reduce noise. The DSP device is a receiver DSP of the SERDES.