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1.发明授权Apparatus including a stall counter to bias processing element selection, and masks to allocate reservation unit entries to one or more processing elements 有权包括偏移处理元件选择的停止计数器的设备以及将预留单元条目分配给一个或多个处理元件的掩码公开(公告)号：US09524191B2
公开(公告)日：2016-12-20
申请号：US12941637
申请日：2010-11-08
申请人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
发明人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
CPC分类号： G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
摘要： A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
摘要翻译： 这里描述用于在多处理元件环境中提供公平性的方法和装置。 掩模元件被用于具有每个处理元件的保留站的相关部分，同时仍然允许对保留站条目的另一部分的公共访问。 此外，偏置逻辑偏离了管线中的处理元件的选择，远离与阻塞档位相关联的处理元件，以提供管道的公平利用。
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公开(公告)号：US20110055525A1
公开(公告)日：2011-03-03
申请号：US12941615
申请日：2010-11-08
申请人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
发明人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
CPC分类号： G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
摘要： A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
摘要翻译： 这里描述用于在多处理元件环境中提供公平性的方法和装置。 掩模元件被用于具有每个处理元件的保留站的相关部分，同时仍然允许对保留站条目的另一部分的公共访问。 此外，偏置逻辑偏离了管线中的处理元件的选择，远离与阻塞档位相关联的处理元件，以提供管道的公平利用。
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公开(公告)号：US20080082796A1
公开(公告)日：2008-04-03
申请号：US11540307
申请日：2006-09-29
IPC分类号： G06F9/30
CPC分类号： G06F9/3851
摘要： In one embodiment, the present invention includes a method for determining if an instruction of a first thread dispatched from a first queue associated with the first thread is stalled in a pipestage of a pipeline, and if so, dispatching an instruction of a second thread from a second queue associated with the second thread to the pipeline if the second thread is not stalled. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于确定从与第一线程相关联的第一队列调度的第一线程的指令是否在流水线的分支中被停止的方法，如果是，则将第二线程的指令从 如果第二线程没有停止，则与第二线程相关联的第二队列到管道。 描述和要求保护其他实施例。
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4.发明授权Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor 有权通过在超线程微处理器中使用失速循环计数器，将选择偏离延迟线程来提供线程公平性公开(公告)号：US08438369B2
公开(公告)日：2013-05-07
申请号：US12941615
申请日：2010-11-08
申请人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
发明人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
IPC分类号： G06F9/40
CPC分类号： G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
摘要： A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
摘要翻译： 这里描述用于在多处理元件环境中提供公平性的方法和装置。 掩模元件被用于具有每个处理元件的保留站的相关部分，同时仍然允许对保留站条目的另一部分的公共访问。 此外，偏置逻辑偏离了管线中的处理元件的选择，远离与阻塞档位相关联的处理元件，以提供管道的公平利用。
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公开(公告)号：US08402253B2
公开(公告)日：2013-03-19
申请号：US11540307
申请日：2006-09-29
CPC分类号： G06F9/3851
摘要： In one embodiment, the present invention includes a method for determining if an instruction of a first thread dispatched from a first queue associated with the first thread is stalled in a pipestage of a pipeline, and if so, dispatching an instruction of a second thread from a second queue associated with the second thread to the pipeline if the second thread is not stalled. Other embodiments are described and claimed.
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公开(公告)号：US20080250233A1
公开(公告)日：2008-10-09
申请号：US11784864
申请日：2007-04-09
申请人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
发明人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
IPC分类号： G06F9/30
CPC分类号： G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
摘要： A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
摘要翻译： 这里描述用于在多处理元件环境中提供公平性的方法和装置。 掩模元件被用于具有每个处理元件的保留站的相关部分，同时仍然允许对保留站条目的另一部分的公共访问。 此外，偏置逻辑偏离了管线中的处理元件的选择，远离与阻塞档位相关联的处理元件，以提供管道的公平利用。
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7.发明授权Providing thread fairness by biasing selection away from a stalling thread using a stall-cycle counter in a hyper-threaded microprocessor 有权在处理器流水线中提供线程公平性，以响应于处理器流水线中的停顿而使用失速循环计数器公开(公告)号：US08521993B2
公开(公告)日：2013-08-27
申请号：US11784864
申请日：2007-04-09
申请人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
发明人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
IPC分类号： G06F9/40
CPC分类号： G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
摘要： A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
摘要翻译： 这里描述用于在多处理元件环境中提供公平性的方法和装置。 掩模元件被用于具有每个处理元件的保留站的相关部分，同时仍然允许对保留站条目的另一部分的公共访问。 此外，偏置逻辑偏离了管线中的处理元件的选择，远离与阻塞档位相关联的处理元件，以提供管道的公平利用。
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公开(公告)号：US20110055524A1
公开(公告)日：2011-03-03
申请号：US12941637
申请日：2010-11-08
申请人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
发明人： Morris Marden , Matthew Merten , Alexandre Farcy , Avinash Sodani , James Hadley , Ilhyun Kim
IPC分类号： G06F9/30
CPC分类号： G06F9/50 , G06F9/30101 , G06F9/3851 , G06F2209/5014
摘要： A method and apparatus for providing fairness in a multi-processing element environment is herein described. Mask elements are utilized to associated portions of a reservation station with each processing element, while still allowing common access to another portion of reservation station entries. Additionally, bias logic biases selection of processing elements in a pipeline away from a processing element associated with a blocking stall to provide fair utilization of the pipeline.
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公开(公告)号：US20070043934A1
公开(公告)日：2007-02-22
申请号：US11208924
申请日：2005-08-22
申请人： Avinash Sodani , James Hadley
发明人： Avinash Sodani , James Hadley
IPC分类号： G06F9/44
CPC分类号： G06F9/3863 , G06F9/384
摘要： Methods and apparatus to provide misprediction recovery through periodic checkpoint are described. In one embodiment, a renamer unit (e.g., within a processor core) recovers a register alias table (RAT) to a state immediately preceding a misprediction.
摘要翻译： 描述了通过定期检查点提供错误预测恢复的方法和装置。 在一个实施例中，重命名单元（例如，处理器核心内）将寄存器别名表（RAT）恢复到紧随错误预测之前的状态。
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公开(公告)号：US08504804B2
公开(公告)日：2013-08-06
申请号：US13613820
申请日：2012-09-13
CPC分类号： G06F9/3851
摘要： In one embodiment, the present invention includes a method for determining if an instruction of a first thread dispatched from a first queue associated with the first thread is stalled in a pipestage of a pipeline, and if so, dispatching an instruction of a second thread from a second queue associated with the second thread to the pipeline if the second thread is not stalled. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明包括一种用于确定从与第一线程相关联的第一队列调度的第一线程的指令是否在流水线的分支中被停止的方法，如果是，则将第二线程的指令从 如果第二线程没有停止，则与第二线程相关联的第二队列到管道。 描述和要求保护其他实施例。
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