Hiding instruction cache miss latency by running tag lookups ahead of the instruction accesses
    7.
    发明授权
    Hiding instruction cache miss latency by running tag lookups ahead of the instruction accesses 有权
    通过在指令访问之前运行标签查找来隐藏指令缓存未命中延迟

    公开(公告)号:US09158696B2

    公开(公告)日:2015-10-13

    申请号:US13992228

    申请日:2011-12-29

    IPC分类号: G06F12/08 G06F9/38

    摘要: This disclosure provides techniques and apparatuses to enable early, run-ahead handling of IC and ITLB misses by decoupling the ITLB and IC tag lookups from the IC data (instruction bytes) accesses, and making ITLB and IC tag lookups run ahead of the IC data accesses. This allows overlapping the ITLB and IC miss stall cycles with older instruction byte reads or older IC misses, resulting in fewer stalls than previous implementations and improved performance

    摘要翻译: 本公开提供了通过将ITLB和IC标签查找与IC数据(指令字节)访问分离并使ITLB和IC标签查找在IC数据之前运行来实现IC和ITLB未命中的早期,预先处理的技术和装置 访问 这允许ITLB和IC错过停顿周期与旧的指令字节读取或较旧的IC错误重叠,导致比以前的实现更少的停顿和改进的性能

    HIDING INSTRUCTION CACHE MISS LATENCY BY RUNNING TAG LOOKUPS AHEAD OF THE INSTRUCTION ACCESSES
    9.
    发明申请
    HIDING INSTRUCTION CACHE MISS LATENCY BY RUNNING TAG LOOKUPS AHEAD OF THE INSTRUCTION ACCESSES 有权
    隐藏指令高速缓存通过运行TAG LOOKUPS之前的指令访问失败

    公开(公告)号:US20140229677A1

    公开(公告)日:2014-08-14

    申请号:US13992228

    申请日:2011-12-29

    IPC分类号: G06F12/08

    摘要: This disclosure provides techniques and apparatuses to enable early, run-ahead handling of IC and ITLB misses by decoupling the ITLB and IC tag lookups from the IC data (instruction bytes) accesses, and making ITLB and IC tag lookups run ahead of the IC data accesses. This allows overlapping the ITLB and IC miss stall cycles with older instruction byte reads or older IC misses, resulting in fewer stalls than previous implementations and improved performance

    摘要翻译: 本公开提供了通过将ITLB和IC标签查找与IC数据(指令字节)访问分离并使ITLB和IC标签查找在IC数据之前运行来实现IC和ITLB未命中的早期,预先处理的技术和装置 访问 这允许ITLB和IC错过停顿周期与旧的指令字节读取或较旧的IC错误重叠,导致比以前的实现更少的停顿和改进的性能