公开(公告)号：US20200373286A1

公开(公告)日：2020-11-26

申请号：US16422072

申请日：2019-05-24

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

Inventor： Lori D. Dennis ,  Jamie A. Bernard ,  Alan F. Dennis ,  Jane O. Gilliam ,  Jason F. Ross ,  Keith K. Sturcken ,  Dale A Rickard

IPC: H01L25/16 ,  H01L23/538 ,  H01L23/00 ,  H01L23/64 ,  H01L25/00 ,  H01L23/498 ,  H01L23/367

Abstract: A multi-chip module hybrid integrated circuit (MCM-HIC) provides cold spare support to an apparatus comprising a plurality of ICs and/or other circuits that are not cold spare compliant. At least one core IC and at least one cold spare chiplet are installed on an interconnecting substrate having a plurality of power zones to which power can be applied and withdrawn as needed. When powered, the cold spare chiplets serve as mediators and interfaces between the non cold spare compliant circuits. When the cold spare chiplets are at least partly unpowered, they protect all interconnected circuits, and ensure that interconnected circuits that remain powered are not hindered by unpowered interconnected circuits. Cold spare chiplets can extend across boundaries between power zones. External circuits can be exclusively interfaced to a subset of the power zones. Separate power circuits within a power zone can be sequenced during application and withdrawal of power.

公开(公告)号：US10467007B1

公开(公告)日：2019-11-05

申请号：US15995303

申请日：2018-06-01

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Steven G Santee ,  Jane O Gilliam ,  Dale A Rickard

IPC: G06F3/00 ,  G06F9/30 ,  G06F9/38 ,  G06F9/52 ,  G06F15/173 ,  G06F15/17 ,  G06F15/76

Abstract: A core suitable for inclusion in an ASIC or other integrated circuit includes a plurality of SPI masters, each of which is able to control and coordinate the timing of a plurality of SPI-controlled devices via an associated SPI bus. Each SPI master is controlled by a corresponding core controller that includes memory, interrupts, flags, timers, and an instruction processor that can independently execute instructions stored in the memory to control data communication between the core controller and its associated SPI master, and between the SPI master and one or more SPI slave devices. The core controllers can be simultaneously started, resynchronized, staggered, and otherwise coordinated with each other. Embodiments further permit bypassing of the core controllers for direct data exchange between external resources and the SPI masters.

公开(公告)号：US10277321B1

公开(公告)日：2019-04-30

申请号：US16122999

申请日：2018-09-06

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Robert T Carlson ,  Amod V Dandawate ,  David A Haessig, Jr. ,  Dale A Rickard

IPC: H04B10/112 ,  H04B10/118 ,  H04B10/50 ,  H04B10/69

Abstract: The Quad Cell permits measurement of four quadrant signal powers simultaneously, metrics which are equal when the laser spot is at the desired zero location, at the center of the cell, the origin of the cells' axes. A control action acts upon the Quad Cell signals to move the laser spot toward the origin of the axes bisecting the four quadrants of the cell, moving the laser spot to the origin to achieve a null in the difference between these four signal levels.

公开(公告)号：US10700046B2

公开(公告)日：2020-06-30

申请号：US16057204

申请日：2018-08-07

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Dale A Rickard ,  Jason F Ross ,  John T Matta ,  Richard J Ferguson ,  Alan F Dennis ,  Joseph R Marshall, Jr. ,  Daniel L Stanley

IPC: H01L25/16 ,  H01L23/498 ,  H01L23/00 ,  H01L25/00 ,  H01L27/112 ,  H01L23/42 ,  H01L23/367

Abstract: An MCM-HIC device flexibly adds enhanced features to a VLSI “core” IC that are not directly supported by the core IC, such as unsupported communication protocols and/or support of cold spare operation. The core IC is mounted on an interconnecting substrate together with at least one “chiplet” that provides the required feature(s). The chiplet can be programmable. The chiplet can straddle a boundary of an interposer region of the substrate that provides higher density interconnections at lower currents. The disclosed method can include selecting a core IC and at least one active, passive, or “mixed” chiplet, configuring a substrate, and installing the core IC and chiplet(s) on the substrate. In embodiments, the core IC and/or chiplet(s) can be modified before assembly to obtain the desired result. Cost can be reduced by pre-designing and, in embodiments, pre-manufacturing the chiplets and modified core ICs in cost-effective quantities.

公开(公告)号：US10236980B1

公开(公告)日：2019-03-19

申请号：US16002052

申请日：2018-06-07

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Robert T Carlson ,  Dennis P Bowler ,  David C Donarski ,  David A Haessig, Jr. ,  Stuart M Lopata ,  Dale A Rickard

IPC: H04B10/112 ,  H04B10/118 ,  G06K9/62 ,  H04B10/079 ,  G06T7/13

Abstract: A disclosed apparatus and method detect light source “hotspots” and recognize laser communication signals within a scene, while minimizing repeat consideration of previously detected light sources. Local maxima are identified in pixel frames from a focal plane array (FPA), and compared with a table of previous detections. FPA frames can be used directly for hotspot detection, or successive FPA frames can be subtracted for edge detection. Most recent detection frame numbers, coordinates, signal values, and/or other information can be updated in the table upon repeat detection of a hotspot. Source identifying information can be included in the table for entries that are identified as laser communication signals. Source identifying features can be evaluated so that only signals of interest are saved in the table. Hotspots that remain undetected after a designated number of frames can be deleted from the table.

公开(公告)号：US20220392854A1

公开(公告)日：2022-12-08

申请号：US17742925

申请日：2022-05-12

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

Inventor： Jason F. Ross ,  Dale A Rickard

IPC: H01L23/00

Abstract: An integrated circuit (IC) implements a radiation tolerance limiting feature (RTLF) to ensure that the IC, as manufactured, will fail one or more applicable radiation tolerance tests, for example by reducing or eliminating a required voltage or blocking a required signal. As a result, the IC can be manufactured by any suitable IC foundry, and exported without restriction. The RTLF can include a leakage component, such as an oxide dielectric capacitor, a radiation-sensitive MOSFET or SCR, or a photocurrent generating component. The RTLF can include redundancy to ensure reliability. A plurality of RTLFs can be included to ensure failure of any desired combination of applicable radiation tolerance tests, such as total radiation dosage, linear energy transfer events, radiation dose rate, and single event upset. The RTLF can be obfuscated within the IC design. The RTLF can include a testing output to ensure its functionality.

公开(公告)号：US10854586B1

公开(公告)日：2020-12-01

申请号：US16422072

申请日：2019-05-24

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

Inventor： Lori D. Dennis ,  Jamie A. Bernard ,  Alan F. Dennis ,  Jane O. Gilliam ,  Jason F. Ross ,  Keith K. Sturcken ,  Dale A Rickard

IPC: G06N20/00 ,  G06F11/07 ,  H01L25/16 ,  H01L23/538 ,  H01L23/00 ,  H01L23/64 ,  H01L25/00 ,  H01L23/498 ,  H01L23/367

Abstract: A multi-chip module hybrid integrated circuit (MCM-HIC) provides cold spare support to an apparatus comprising a plurality of ICs and/or other circuits that are not cold spare compliant. At least one core IC and at least one cold spare chiplet are installed on an interconnecting substrate having a plurality of power zones to which power can be applied and withdrawn as needed. When powered, the cold spare chiplets serve as mediators and interfaces between the non cold spare compliant circuits. When the cold spare chiplets are at least partly unpowered, they protect all interconnected circuits, and ensure that interconnected circuits that remain powered are not hindered by unpowered interconnected circuits. Cold spare chiplets can extend across boundaries between power zones. External circuits can be exclusively interfaced to a subset of the power zones. Separate power circuits within a power zone can be sequenced during application and withdrawal of power.