BIAS SEQUENCING AND SWITCHING CIRCUIT
    1.
    发明申请

    公开(公告)号:US20200136571A1

    公开(公告)日:2020-04-30

    申请号:US16169092

    申请日:2018-10-24

    Abstract: The present disclosure provide a device, system, and method for generating, in an electrical device, a 1 bit or a 0 bit that is received in a switching circuit powered by a battery. The device, system, and method generates, in the switching circuit, a negative bias voltage and a positive bias voltage. The device, system, and method transmits the negative bias voltage and the positive bias voltage to a power amplifier. The device, system, and method turns the power amplifier from an off-state to an on-state in response to receiving the negative bias voltage. The device, system, and method amplifies, with the power amplifier, a power signal moving through power amplifier when the amplifier is in the on-state.

    Bias sequencing and switching circuit

    公开(公告)号:US10784826B2

    公开(公告)日:2020-09-22

    申请号:US16169092

    申请日:2018-10-24

    Abstract: The present disclosure provide a device, system, and method for generating, in an electrical device, a 1 bit or a 0 bit that is received in a switching circuit powered by a battery. The device, system, and method generates, in the switching circuit, a negative bias voltage and a positive bias voltage. The device, system, and method transmits the negative bias voltage and the positive bias voltage to a power amplifier. The device, system, and method turns the power amplifier from an off-state to an on-state in response to receiving the negative bias voltage. The device, system, and method amplifies, with the power amplifier, a power signal moving through power amplifier when the amplifier is in the on-state.

    WIDE BAND TUNABLE TRANSCEIVER
    4.
    发明公开

    公开(公告)号:US20230275604A1

    公开(公告)日:2023-08-31

    申请号:US18310083

    申请日:2023-05-01

    CPC classification number: H04B1/0096 H04B1/04 H04B1/745 H04B2001/70935

    Abstract: A transceiver having a down-converter for converting a radio-frequency (RF) input signal to an intermediate frequency (IF) signal with an analog low latency bypass path coupled to the IF signal and configured to provide a low latency IF signal and an up-converter for converting an IF signal to an RF signal. There is a digital path coupled to the IF signal and configured to provide a digitally processed IF signal, and an up-converter for converting at least one of the low latency IF signal and the digitally processed IF signal to an RF output signal. In a further example, the down-converter and the up-converter convert to millimeter wave frequencies and filters the millimeter wave frequencies with cavity filters.

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