公开(公告)号：US20170031012A1

公开(公告)日：2017-02-02

申请号：US14813159

申请日：2015-07-30

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc..

Inventor： Allen W Hairston ,  Gary M Madison

IPC: G01S7/497

CPC classification number: G01S7/497 ,  G01S17/105 ,  G01S17/89

Abstract: The invention measures the frequency of a heterodyne laser radar (LADAR) system signal in the input cell of a focal plane array (FPA). Embodiments amplify the return signal, and drive it into a counter for a fixed period of time. The frequency is the number of counts divided by the count time. An example design amplifier amplifies the return of a single photon response of an avalanche photodiode with a gain of 100 into a digital signal level at a 200 MHz rate with only 84 μW, demonstrating the feasibility of the approach.

Abstract translation: 本发明测量焦平面阵列（FPA）的输入单元中的外差激光雷达（LADAR）系统信号的频率。 实施例放大返回信号，并将其驱动到计数器一段固定的时间。 频率是计数次数除以计数时间。 一个示例设计放大器将具有100增益的雪崩光电二极管的单个光子响应的返回放大到200MHz速率的数字信号电平，仅具有84μW，表明该方法的可行性。

公开(公告)号：US20130284902A1

公开(公告)日：2013-10-31

申请号：US13804994

申请日：2013-03-14

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Gary M Madison

IPC: H03F3/08

CPC classification number: H03F3/082

Abstract: An input clamping circuit of a photo detector preamplifier is activated when an input transistor is turned off by an input overload, and the drain voltage of the input transistor is pulled toward ground by a current source. Even with extreme overloads, the operating conditions (Vgs and Id) of the input transistor remain within normal range. During normal operation, the clamping circuit is biased completely off, and has essentially no effect on circuit performance. Since the input FET itself, rather than a separate device, detects the onset of an overload, significantly improved clamping performance is realized without adding additional circuit complexity. The input transistor can be a FET. The preamplifier can be a cascode preamplifier. The clamping circuit can include a clamping FET or other clamping transistor gated by the input transistor drain. In embodiments, the clamping circuit increases current requirements of the preamplifier by no more than 25%.

Abstract translation: 当输入晶体管被输入过载关断时，光电检测器前置放大器的输入钳位电路被激活，并且输入晶体管的漏极电压被电流源拉向地。 即使极端过载，输入晶体管的工作条件（Vgs和Id）保持在正常范围内。 在正常工作期间，钳位电路完全偏离，对电路性能基本没有影响。 由于输入FET本身而不是单独的器件检测到过载的开始，因此实现了显着提高的钳位性能，而不增加额外的电路复杂性。 输入晶体管可以是FET。 前置放大器可以是共源共栅前置放大器。 钳位电路可以包括由输入晶体管漏极门控的钳位FET或其它钳位晶体管。 在实施例中，钳位电路将前置放大器的电流要求提高不超过25％。

公开(公告)号：US10073168B2

公开(公告)日：2018-09-11

申请号：US14813159

申请日：2015-07-30

Applicant: BAE SYSTEMS Information and Electronic Systems Integration Inc.

Inventor： Allen W Hairston ,  Gary M Madison

IPC: G01S7/497 ,  G01S17/10 ,  G01S17/89

CPC classification number: G01S7/497 ,  G01S17/105 ,  G01S17/89

Abstract: The invention measures the frequency of a heterodyne laser radar (LADAR) system signal in the input cell of a focal plane array (FPA). Embodiments amplify the return signal, and drive it into a counter for a fixed period of time. The frequency is the number of counts divided by the count time. An example design amplifier amplifies the return of a single photon response of an avalanche photodiode with a gain of 100 into a digital signal level at a 200 MHz rate with only 84 μW, demonstrating the feasibility of the approach.