Signal detection based on Gibbs phenomenon

    公开(公告)号:US11177848B1

    公开(公告)日:2021-11-16

    申请号:US17018299

    申请日:2020-09-11

    Abstract: Techniques are provided for signal detection based on the Gibbs phenomenon. A methodology implementing the techniques according to an embodiment includes transforming an input signal to the frequency domain and performing median filtering of amplitudes associated with frequency bins of the frequency domain transformed input signal. The median filtering is performed to attenuate longer duration or continuous signal components that may be present in the input signal. The method also includes identifying a sinc function main lobe in the median filtered signal, the sinc function associated with the Gibbs phenomenon. The method further includes detecting a discontinuity in the input signal based on the identified sinc function main lobe. The discontinuity is associated with a shorter duration signal component that is present in the input signal. Shorter duration signal components may include relatively narrow signal pulses and relatively fast rising or falling signal edges.

    NON-INTEGER INTERPOLATION FOR SIGNAL SAMPLING AT ASYNCHRONOUS CLOCK RATES

    公开(公告)号:US20240372693A1

    公开(公告)日:2024-11-07

    申请号:US18309896

    申请日:2023-05-01

    Abstract: Techniques are provided for non-integer interpolation for signal sampling. A system implementing the techniques according to an embodiment includes a memory configured to store frequency values associated with an input signal sampled at a first clock rate. The system also includes a clock phase detector configured to detect phase alignment between a first clock signal associated with the first clock rate and a second clock signal associated with a second clock rate. The system further includes a read circuit configured to adjust an interpolation time interval in response to the detected phase alignment and to read the frequency values from the memory at the adjusted interpolation time interval. The system further includes a phase accumulator configured to accumulated phase as a sum of the frequency values read from the memory. The system further includes a waveform generator configured to generate an output waveform sample based on the accumulated phase.

    Combined spatial and time multiplexer

    公开(公告)号:US11139883B1

    公开(公告)日:2021-10-05

    申请号:US17018308

    申请日:2020-09-11

    Abstract: A combined spatial and time multiplexer device is disclosed. The device organizes and selects any signal(s), including past data, from amongst a plurality of time division multiplexed (TDM) data streams. The data streams are collected by memory devices that are configured to separately store the multiplexed signals such that different time portions of the signals from each data stream are stored in different addressable sections. This allows for the current time data and past time data for a given signal to be selected and outputted by the device. According to an embodiment, each of the memory devices receives an address select signal and selects a signal group based on the address select signal. The device also includes a multiplexer that selects one of the signal groups from amongst the memory devices to output as the requested signal group.

    Digital amplitude control for transmission of radio frequency signals

    公开(公告)号:US11070240B1

    公开(公告)日:2021-07-20

    申请号:US17069466

    申请日:2020-10-13

    Abstract: Techniques are provided for amplitude control of radio frequency signals for transmission. A methodology implementing the techniques according to an embodiment includes calculating an average power level of a segment of the signal. The method also includes calculating a maximum magnitude of samples of the segment. The method further includes generating a first scale factor based on the average power level, as a calculation of the reciprocal of the square root of the ratio of the average power level to a maximum power limit. The method further includes generating a second scale factor based on the maximum magnitude, as a calculation of the ratio of the maximum magnitude limit to the maximum magnitude. The method further includes scaling the samples of the segment based on the smaller of the first and second scale factors.

    Non-integer interpolation for signal sampling at asynchronous clock rates

    公开(公告)号:US12160494B2

    公开(公告)日:2024-12-03

    申请号:US18309896

    申请日:2023-05-01

    Abstract: Techniques are provided for non-integer interpolation for signal sampling. A system implementing the techniques according to an embodiment includes a memory configured to store frequency values associated with an input signal sampled at a first clock rate. The system also includes a clock phase detector configured to detect phase alignment between a first clock signal associated with the first clock rate and a second clock signal associated with a second clock rate. The system further includes a read circuit configured to adjust an interpolation time interval in response to the detected phase alignment and to read the frequency values from the memory at the adjusted interpolation time interval. The system further includes a phase accumulator configured to accumulated phase as a sum of the frequency values read from the memory. The system further includes a waveform generator configured to generate an output waveform sample based on the accumulated phase.

    Data clustering in logic devices using unsupervised learning

    公开(公告)号:US11461372B1

    公开(公告)日:2022-10-04

    申请号:US17205161

    申请日:2021-03-18

    Abstract: A data clustering device includes an input configured to receive a plurality of data points encoded in at least one signal and a hardware logic circuit configured to extract one or more features of the one or more data points from the at least one signal, create or update, based on the one or more features, one or more data clusters representing one or more of the data points, and encode at least one of the one or more data clusters in at least one output signal. The device further includes an output configured to provide the at least one output signal, for instance, to a processor, such as a processor for controlling a controlled system. The device can be further configured to split or merge the data cluster(s) based on a statistical distribution of the one or more data points in the respective data cluster.

    Storage method using memory chain addressing

    公开(公告)号:US11221792B1

    公开(公告)日:2022-01-11

    申请号:US17069757

    申请日:2020-10-13

    Abstract: A storage system is configured to facilitate memory operations with the memory that avoid the need for defragmentation. The system includes one or more memory devices and a memory interface operatively coupled with the one or more memory devices. The memory interface includes a start page module that provides a start page table having a page number that includes a first part of a corresponding dataset. A link page module of the memory interface provides a link page table that indicates an address for a current page of a given dataset and an address for a next page of the given dataset. Write/read page modules of the memory interface provide write/read page tables that include sub-addresses of a page where a portion of a corresponding dataset is being written/read. The memory interface executes data read, write, and erase operations that are tracked using the tables provided by the various modules.

    Digital detection and tracking of signals over multiple frequency bins

    公开(公告)号:US11177852B1

    公开(公告)日:2021-11-16

    申请号:US17027901

    申请日:2020-09-22

    Abstract: Techniques are provided for tracking of signals. A methodology implementing the techniques according to an embodiment includes filtering a first segment of an input signal, associated with a first time interval, into a first plurality of frequency bins. The method also includes detecting a signal of interest (SOI) in one of the first plurality of frequency bins. The method further includes filtering a second segment of the input signal, associated with a second time interval, into a second plurality of frequency bins. The method further includes determining movement of the SOI from a first frequency bin, of the first plurality of frequency bins, to a second frequency bin, of the second plurality of frequency bins. The method further includes tracking the SOI based on the movement determination. In some cases, the method further includes creating a composite signal based on the tracking over multiple frequency bins and multiple time intervals.

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