Abstract:
A compensation circuit, a gate driving unit, a gate driving circuit, driving methods thereof and a display device are provided. The compensation circuit includes: a pull-up node voltage control sub-circuit configured to control a first voltage input end to output a first voltage to a pull-up node voltage output end under the control of a control node; and a control node control sub-circuit configured to control a voltage compensation clock signal input end to input a voltage compensation clock signal to the control node under the control of a pull-up input end, control a second voltage input end to input a second voltage to the control node under the control of a voltage compensation resetting end, and control a touch ending signal input end to input a touch ending signal to the control node under the control of a pull-up node voltage output end.
Abstract:
A sealing method of display panel, comprising: forming closed inner sealant layer in a sealing region of a first substrate; forming outer sealant layer which encloses the inner sealant layer, in which a communicating region is provided, the communicating region is configured to communicate a region between the inner sealant layer and the outer sealant layer and a region outside the outer sealant layer; affixing a second substrate to the first substrate in position to form a motherboard; and sealing the communicating region after cutting out the display panel from the motherboard. A display panel and a display device are also disclosed.
Abstract:
The present disclosure relates to a method for packaging an OLED display panel, an OLED display panel and an OLED display device. The method for packaging an OLED display panel comprises: providing a substrate and a cover plate, and forming a covering layer on the substrate, wherein the covering layer has a concave structure. The method further comprises forming another covering layer having a convex structure or forming an adhesive on the cover plate, wherein a bump of the convex structure or the adhesive may be accommodated in a recess of the concave structure.
Abstract:
Provided are a display driving circuit, a display device and a driving method thereof, which are capable of avoiding an influence of a feed through effect on a voltage difference between a pixel electrode and a common electrode and thus improving the quality of a displayed picture. The display driving circuit comprises a gate driving unit for controlling a thin film transistor TFT to be turned on, a source driving unit for outputting a signal to a source of the TFT, and a circuit unit for supplying a power to a common electrode, the circuit unit outputs a first voltage to the common electrode when the TFT is in a turn-on state, and the circuit unit outputs a second voltage to the common electrode when the TFT is in a turn-off state, wherein the first voltage is a voltage different from the second voltage.
Abstract:
The present disclosure provides a driving method and a driver integrated circuit configured to drive a touch screen using such driving method, for shortening a touch time of the touch screen, thereby prolonging a display time of the touch screen and accordingly improving the charging rate of pixels. The touch screen includes a plurality of touch electrodes arranged in an array and is provided with a time period for displaying a frame, which time period is divided into a touch time period and a display time period. The method includes: dividing the plurality of touch electrodes into at least two groups; and during the touch time period of each frame, scanning each group of touch electrodes with a touch scanning duration which the longest one of durations required for scanning the touch electrodes in the group of touch electrodes.
Abstract:
The present disclosure provides a gate driving circuit, a gate driving method, and a display apparatus. The gate driving circuit comprises a driving control unit and a gate signal generation unit, wherein the driving control unit is configured to generate a driving control signal corresponding to a respective display pattern, and the gate signal generation unit is connected to the driving control unit and is configured to generate a multi-order gate voltage in response to the driving control signal generated by the driving control unit, wherein duration of a low order voltage included in the generated multi-order gate voltage corresponds to the respective display pattern. The gate driving circuit according to the present disclosure can achieve driving for display by using a multi-order gate voltage having a low order voltage in long duration when the corresponding display apparatus is in a flicker pattern, so as to eliminate image flicker.
Abstract:
Provided are a level shift circuit, a gate driving circuit and a display apparatus. The level shift circuit includes: a third to a sixth transistor, sources and gates thereof being connected to a DC power source and an offset voltage terminal respectively; a seventh transistor, source and gate thereof being connected to a reference ground and the offset voltage terminal respectively; and a first to a second transistor, gates and sources thereof being connected to an input signal terminal and drain of seventh transistor respectively, wherein drains of third and fifth transistors are connected as a first output terminal which is connected to drain of the first transistor, drains of fourth and sixth transistors are connected as a second output terminal which is connected to drain of the second transistor. Common-mode voltage of two output terminals of the level shift circuit with respect to the reference ground is not reduced.
Abstract:
According to embodiments of the present invention, the gate lines of the array substrate receive the gate scanning signal in a preset time period. Specifically, the gate lines of pixel units in odd rows are receiving the gate scanning signal in the first time interval of the preset time period, and the gate lines of pixel units in even rows are receiving the gate scanning signal in the second time interval of the preset time period.
Abstract:
A polarity inversion driving method, a driving apparatus and a liquid crystal display device, for attenuating the flickers due to POL inversion. The polarity inversion driving method is used for inversion of polarity of pixels on the liquid crystal panel, and comprises: generating a polarity inversion reference signal for reflecting selection of polarity of each row of pixels on the liquid crystal panel; generating a control signal comprising control levels generated in m frames, where m is an integer higher than or equal to two, wherein width of the control level in each of the m frames is gradually increased in chronological order to be equal to a time length of one frame; as an alternative, the width of the control level in each of the m frames is gradually decreased in chronological order from the time length of one frame to zero; and generating a polarity inversion signal from the polarity inversion reference signal and the control signal.
Abstract:
The present disclosure relates to the display technique. Disclosed is a display driving circuit, including: a gate line driving circuit, configured to separate gate line driving signals of adjacent rows according to a first output enable signal; a shielding signal generation circuit, configured to trigger and generate a shielding signal when the gate line driving signal needs to be turned off; and a gate line shielding circuit configured to shield the first output enable signal according to the shielding signal so as to turn off the gate line driving signal, wherein the first output enable signal is inputted from a first inputting terminal of the gate line shielding circuit, the shielding signal is inputted from a second inputting terminal of the gate line shielding circuit, and an outputting terminal of the gate line shielding circuit is connected to the gate line driving circuit. The display driving circuit, a driving method thereof and a display apparatus according to the embodiments of the present disclosure are capable of shielding the first output enable signal directly according to the shielding signal so as to turn off the gate line driving signal and shield the data on the corresponding gate lines, thereby they can avoid occurring of abnormal statuses with the first output enable signal and also can save the cost and space of the circuit.