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公开(公告)号：US12293720B2
公开(公告)日：2025-05-06
申请号：US18708302
申请日：2023-08-31
IPC: G09G3/3233 , H10K59/121 , H10K59/131
Abstract: A pixel circuit includes: data writing sub-circuit coupled to data signal terminal, scanning signal terminal and fourth node; first light-emitting control sub-circuit coupled to first voltage terminal, first light-emitting control terminal and second node; driving sub-circuit coupled to first node, the second node and third node; storage sub-circuit coupled to the first node and the fourth node; compensation sub-circuit coupled to compensation signal terminal, the first node and the third node; second light-emitting control sub-circuit coupled to the third node, second light-emitting control terminal, and an electrode of light-emitting element; first initialization sub-circuit coupled to first reset signal terminal, first initialization signal terminal and the fourth node; second initialization sub-circuit coupled to second reset signal terminal, second initialization signal terminal and an electrode of the light-emitting element; third initialization sub-circuit coupled to third reset signal terminal, third initialization signal terminal and the third node.
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公开(公告)号：US12238999B2
公开(公告)日：2025-02-25
申请号：US17629360
申请日：2021-02-07
Inventor： Ke Liu , Ling Shi , Yipeng Chen , Lang Liu , Zhenhua Zhang , Xuewei Tian
IPC: H10K59/35 , H10K59/121 , H10K59/131
Abstract: A display substrate, a display panel and a display apparatus are provided. The display substrate includes a first display region and a second display region, and a light transmittance of the first display region is greater than a light transmittance of the second display region. A plurality of sub-pixels located in the first display region includes a plurality of sub-pixel groups, each sub-pixel group includes a first sub-pixel and a second sub-pixel, the first pixel driving circuit includes a first sub-pixel driving circuit and a second sub-pixel driving circuit. The first sub-pixel driving circuit includes at least a first reset transistor, the second sub-pixel driving circuit includes at least a second reset transistor, and the first reset transistor of the first sub-pixel driving circuit and the second reset transistor of the second sub-pixel driving circuit are at least partially shared with each other.
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公开(公告)号：US12236855B2
公开(公告)日：2025-02-25
申请号：US17772152
申请日：2021-05-25
Inventor： Shuai Xie , Xuewei Tian , Ling Shi , Yipeng Chen
IPC: G09G3/3208
Abstract: Disclosed are a pixel circuit, a driving method thereof, and a display apparatus. The pixel circuit includes a driving sub-circuit, a writing sub-circuit, a compensation sub-circuit, a reset sub-circuit, and a light-emitting element, the driving sub-circuit provides a driving current to a third node in response to a control signal of a first node; the writing sub-circuit writes a signal of a data signal line to a second node in response to a control signal of a first scan signal line, the signal of the data signal line is a data voltage signal or a reset voltage signal; the compensation sub-circuit writes the reset voltage signal to the third node in response to a control signal of the first scan signal line; the compensation sub-circuit further compensates the first node in response to a control signal of the first scan signal line.
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公开(公告)号：US12190781B2
公开(公告)日：2025-01-07
申请号：US17910539
申请日：2021-10-25
Inventor： Zhu Wang , Zhenglong Yan , Hui Lu , Ke Liu , Ling Shi , Yipeng Chen
Abstract: Provided is a shift register unit. The shift register unit includes a first input circuit, a second input circuit and an output circuit. The first input circuit is coupled to a first clock terminal, a first node, a second node, a third node, a pull-up power supply terminal, and a pull-down power supply terminal. The second circuit is coupled to the first node, the second node, the third node, the pull-up power supply terminal, the pull-down power supply terminal, an input control terminal, and the first clock terminal. The output circuit is coupled to the pull-up power supply terminal, the pull-down power supply terminal, the third node, a second clock terminal, and an output terminal.
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公开(公告)号：US12137586B2
公开(公告)日：2024-11-05
申请号：US17432951
申请日：2020-11-18
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yipeng Chen , Ling Shi , Ke Liu , Zhenhua Zhang
IPC: H10K59/131 , H10K59/121 , H10K59/126 , H10K59/179 , H10K59/35 , H10K59/12
Abstract: Provided are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes: a first display region and a second display region; the first display region includes a plurality of first pixels, wherein the first pixel includes a passive light-emitting device, the second display region includes a plurality of second pixels, wherein the second pixel includes an active light-emitting device and a pixel drive circuit electrically connected to the active light-emitting device. The first display region includes a plurality of first driving signal wire groups, each first driving signal wire group corresponds to a first pixel row. The first pixel row includes one row of the first pixels, and each first driving signal group includes a plurality of first driving signal wires.
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Patent Agency Ranking
公开(公告)号：US12133439B2
公开(公告)日：2024-10-29
申请号：US18483533
申请日：2023-10-10
Inventor： Ling Shi , Ke Liu , Yipeng Chen , Zhenhua Zhang
IPC: G09G3/32 , G09G3/3216 , G09G3/3225 , H10K59/131 , H10K59/179 , H10K59/35
CPC classification number: H10K59/353 , G09G3/3216 , G09G3/3225 , H10K59/131 , H10K59/179 , H10K59/351 , H10K59/352 , G09G2300/0426 , G09G2300/0452
Abstract: A display panel includes a substrate, first light-emitting devices located in a first display area, a first driving circuit, second light-emitting devices located in a second display area, and a second driving circuit. The first driving circuit is configured to actively drive the first light-emitting devices to emit light, and includes a plurality of pixel driving circuits and a signal line. The signal line is located in the second display area, and extends along an edge of the second display area. An orthographic projection of the signal line on the substrate and an orthogonal projection of the first display area on the substrate have a gap therebetween. The second driving circuit is configured to passively drive the second light-emitting devices to emit light. An orthographic projection of at least one of the second light-emitting devices on the substrate is overlapped with an orthogonal projection of the gap on the substrate.
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公开(公告)号：US12127455B2
公开(公告)日：2024-10-22
申请号：US18354028
申请日：2023-07-18
Inventor： Ling Shi , Yipeng Chen , Xuewei Tian , Ke Liu , Dan Guo , Zhenhua Zhang
IPC: H10K59/131 , G09G3/3241 , H01L27/12 , H10K59/121 , H10K59/122 , H10K59/35 , H10K59/65
CPC classification number: H10K59/131 , G09G3/3241 , H10K59/1216 , H10K59/122 , H10K59/65 , G09G2300/0465 , G09G2300/0819 , G09G2300/0842 , G09G2360/14 , H01L27/124 , H10K59/1213 , H10K59/35
Abstract: A display substrate is provided, including: a base substrate and a plurality of sub-pixels disposed on the base substrate. Each sub-pixel includes a pixel driving circuit, and the pixel driving circuit includes a writing transistor, a compensation transistor, a first reset transistor, and a storage capacitor. The display substrate includes a semiconductor layer, a first conductive layer and a second conductive layer disposed in sequence on the base substrate. Gates of the writing transistor, the compensation transistor and the first reset transistor are in the first conductive layer and are implemented as an integral structure. Active layers of the writing transistor, the compensation transistor and the first reset transistor are in the semiconductor layer. A first storage capacitor electrode of the storage capacitor is in the first conductive layer, and a second storage capacitor electrode of the storage capacitor is in the second conductive layer.
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公开(公告)号：US12125546B2
公开(公告)日：2024-10-22
申请号：US17913617
申请日：2021-10-28
IPC: G11C19/28 , G09G3/32 , G09G3/3266 , G09G3/36
CPC classification number: G11C19/28 , G09G3/32 , G09G3/3266 , G09G3/3677 , G09G2300/0852 , G09G2310/0286
Abstract: A shift register includes a first input sub-circuit being configured to transmit an input signal to a first node under control of a first clock signal; a second input sub-circuit being configured to transmit a first voltage signal to a second node under control of the first clock signal; a first control sub-circuit being configured to transmit a second clock signal to a third node under control of a voltage at the second node; a second control sub-circuit being configured to transmit the first voltage signal to a fourth node under control of a third clock signal; a noise reduction sub-circuit being configured to transmit the first voltage signal to a signal output terminal under control of a voltage at the fourth node; and an output sub-circuit being configured to transmit a second voltage signal to the signal output terminal under control of a voltage at the third node.
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公开(公告)号：US20240276774A1
公开(公告)日：2024-08-15
申请号：US18022897
申请日：2022-05-31
Inventor： Hui Lu , Hongting Lu , Yunpeng Zhang , Ling Shi , Changchang Liu
IPC: H10K59/122 , H10K59/80
CPC classification number: H10K59/122 , H10K59/873
Abstract: This disclosure provides a display substrate and a display device. The display substrate includes: a display region and a bezel region adjacent to the display region; the display substrate further includes: a partition structure and a cathode layer, the partition structure is located in the bezel region; the cathode layer includes a portion located in the display region and a portion located in the bezel region, and the cathode layer is partitioned by the partition structure.
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公开(公告)号：US11950454B2
公开(公告)日：2024-04-02
申请号：US17279675
申请日：2020-05-11
Inventor： Ling Shi , Hao Zhang , Yipeng Chen , Wenqiang Li , Chienpang Huang
IPC: H10K59/121 , H10K50/844 , H10K59/131 , H10K59/65
CPC classification number: H10K59/121 , H10K50/844 , H10K59/131 , H10K59/65
Abstract: A display panel and a display device are disclosed, the display panel comprises: a base substrate; and pixel circuits in an array, the display panel comprises a light transmittance region and a display region around the light transmittance region, the pixel circuits are disposed in the display region, a gate line of each row of m rows of pixel circuits is divided into a first gate line portion and a second gate line portion which are connected through an auxiliary gate line, a data line of each column of n columns of pixel circuits is divided into a first data line portion and a second data line portion which are connected through an auxiliary data line.
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