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公开(公告)号：US20230377506A1
公开(公告)日：2023-11-23
申请号：US17634733
申请日：2021-03-29
Inventor： Qiujie SU , Yingmeng MIAO , Dongchuan CHEN , Yanping LIAO , Seungmin LEE , Xibin SHAO , Xiaofeng YIN
CPC classification number: G09G3/2096 , G06F3/0412 , G06F3/0416 , G09G2310/0267 , G09G2310/0275
Abstract: A display module and a display apparatus, relate to the technical filed of display. At least one chip group and a group of first PLG wirings corresponding to each of the chip groups are disposed in a first bonding area, each of the chip groups includes at least two groups of chip units, each group of the chip units includes at least one gate drive chip, each group of the first PLG wirings includes a first wiring and at least one second wiring; power pins of any two adjacent gate drive chips are connected by the first wiring, each of the second wirings surrounds and passes through each of the gate drive chips, the first wirings connected with the power pin of the last gate drive chip in the previous group of the chip units and any of the second wirings, are parallelly connected with the power pin of the first gate drive chip in the next group of the chip units, to reduce the luminance difference of pixels driven by the gate drive chips in each group of the chip units.
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公开(公告)号：US20220075498A1
公开(公告)日：2022-03-10
申请号：US17454944
申请日：2021-11-15
Inventor： Qiujie SU
Abstract: A shift register unit includes a first pull-up node control circuit, a second pull-up node control circuit, a pull-down node control circuit, an output pull-up circuit and an output pull-down circuit. The first pull-up node control circuit is configured to control a first pull-up node to be electrically connected to a second voltage end under the control of an input signal, and control the first pull-up node to be electrically connected to a first voltage end under the control of a resetting signal. The second pull-up node control circuit is configured to control the second pull-up node to be electrically connected to the second voltage end under the control of the input signal applied to the input end, and control the second pull-up node to be electrically connected to the first voltage end under the control of the resetting signal from the resetting end.
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公开(公告)号：US20210193685A1
公开(公告)日：2021-06-24
申请号：US15779222
申请日：2017-09-29
Inventor： Ning ZHU , Qiujie SU , Chongyang ZHAO
IPC: H01L27/12
Abstract: An array substrate and a manufacturing method thereof, a display panel and a display device are provided. The array substrate includes common electrodes, multiple first common electrode lines and multiple second common electrode lines. The multiple first common electrode lines intersect with the multiple second common electrode lines to form grids. The multiple first common electrode lines are connected with the common electrodes through first via-holes and the multiple second common electrode lines are connected with the common electrodes through second via-holes.
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公开(公告)号：US20240264689A1
公开(公告)日：2024-08-08
申请号：US18636813
申请日：2024-04-16
Inventor： Qiujie SU , Chongyang ZHAO , Yanping LIAO , Zhihua SUN , Seungmin LEE
CPC classification number: G06F3/0412 , G06F3/044 , G06F2203/04103
Abstract: An array substrate, a manufacturing method of the array substrate, and a touch display device are provided. Orthographic projections of the touch signal lines adjacent to each other included in a same touch signal line group on the base substrate are respectively provided on two sides of an orthographic projection of a same second signal line on the base substrate, each of the orthographic projections of the touch signal lines adjacent to each other and the orthographic projection of the same second signal line includes a portion provided between orthographic projections of the touch electrodes adjacent to each other on the base substrate, and a layer in which the touch signal lines adjacent to each other are provided is different from a layer in which the same second signal line is provided.
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公开(公告)号：US20240213262A1
公开(公告)日：2024-06-27
申请号：US17912255
申请日：2021-12-31
Inventor： Qiujie SU , Lingdan BO , Dongchuan CHEN , Jiantao LIU , Jianbo XIAN
CPC classification number: H01L27/124 , G09G3/20 , G11C19/287 , G09G2310/0286
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes: a base substrate including a non-display area; a gate drive circuit located in the non-display area, where the gate drive circuit includes a plurality of shift registers, and the plurality of shift registers are divided into a plurality of register sets; and a plurality of signal lead-in lines located in the non-display area, where the plurality of signal lead-in lines are divided into a plurality of line sets, a frame start signal end of one register set is correspondingly and electrically connected to one line set, and two signal lead-in lines of one line set are provided with the signal lead-in line of another line set therebetween.
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Patent Agency Ranking
公开(公告)号：US20240061521A1
公开(公告)日：2024-02-22
申请号：US18489747
申请日：2023-10-18
Inventor： Qiujie SU , Yanping LIAO , Yingmeng MIAO , Chongyang ZHAO , Bo HU , Xiaofeng YIN
IPC: G06F3/041 , G02F1/1333 , G02F1/1343 , G02F1/1362 , H01L27/12
CPC classification number: G06F3/0412 , G02F1/13338 , G02F1/134309 , G02F1/136204 , G02F1/136286 , H01L27/124 , G06F3/044
Abstract: An array substrate and a touch display device are provided. In the array substrate, a first control unit and a second control unit are arranged opposite to each other in a first direction. A plurality of touch sensor blocks includes a first group of electrode blocks and a second group of electrode blocks arranged in the first direction, and a plurality of touch signal lines includes a first group of touch signal lines and a second group of touch signal lines arranged in the first direction. The touch signal lines in the first group of touch signal lines are coupled to the touch sensor blocks in the first group of electrode blocks respectively; and the touch signal lines in the second group of touch signal lines are coupled to the touch sensor blocks in the second group of electrode blocks respectively.
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公开(公告)号：US20240055440A1
公开(公告)日：2024-02-15
申请号：US17637485
申请日：2021-03-26
Inventor： Qiujie SU , Zhihua SUN , Tao YANG , Dongchuan CHEN , Yingmeng MIAO , Jiantao LIU , Seungmin LEE
IPC: H01L27/12 , G02F1/1362 , G02F1/1343 , G02F1/1368
CPC classification number: H01L27/124 , G02F1/136286 , G02F1/134345 , G02F1/1368
Abstract: The present disclosure relates to an array substrate and a display device. The array substrate may include: a first substrate, and a plurality of pixel groups and a plurality of columns of data lines formed on the first substrate; wherein the plurality of pixel groups are arranged in an array along a row direction and a column direction, and each pixel group includes two sub-pixels arranged in the row direction; at least one sub-pixel of one of any two adjacent pixel groups in the row direction corresponds to the same color as one sub-pixel of the other pixel group; and any two adjacent sub-pixels in the row direction correspond to different colors; and each column of data line and each column of pixel groups are alternately arranged in the row direction.
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公开(公告)号：US20210333973A1
公开(公告)日：2021-10-28
申请号：US16612998
申请日：2019-02-28
Inventor： Qiujie SU
Abstract: A shift register unit includes a first pull-up node control circuit, a second pull-up node control circuit, a pull-down node control circuit, an output pull-up circuit and an output pull-down circuit. The first pull-up node control circuit is configured to control a first pull-up node to be electrically connected to a second voltage end under the control of an input signal, and control the first pull-up node to be electrically connected to a first voltage end under the control of a resetting signal and/or a voltage signal at a pull-down node. The second pull-up node control circuit is configured to control a second pull-up node to be electrically connected to an input end under the control of the input signal, and control the second pull-up node to be electrically connected to the first voltage end under the control of the resetting signal.
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公开(公告)号：US20190172844A1
公开(公告)日：2019-06-06
申请号：US16093223
申请日：2018-02-27
IPC: H01L27/12 , H01L29/417 , G02F1/1368
Abstract: An array substrate, a display panel and a display device are disclosed. The array substrate includes a base substrate and a plurality of pixel unit. Each of the pixel unit includes a thin-film-transistor, and the thin-film-transistor includes a gate electrode and a drain electrode; the drain electrode includes a first drain electrode portion, a second drain electrode portion and a first connection portion; and an orthographic projection of the first drain electrode portion on the base substrate and an orthographic projection of the gate electrode on the base substrate are spaced apart, and an orthographic projection of the second drain electrode portion on the base substrate and the orthographic projection of the gate electrode on the base substrate at least partially overlap.
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公开(公告)号：US20240296806A1
公开(公告)日：2024-09-05
申请号：US18663239
申请日：2024-05-14
Inventor： Qiujie SU
IPC: G09G3/36 , G02F1/1335 , G02F1/1339 , G02F1/1343 , G02F1/136 , G02F1/1362 , G02F1/1368 , H01L27/12
CPC classification number: G09G3/3614 , G02F1/133512 , G02F1/134309 , G02F1/13606 , G02F1/136213 , G02F1/136286 , G02F1/1368 , G09G3/3648 , H01L27/124 , G02F1/13394 , G02F1/13439 , G02F2201/52 , G02F2203/52 , G09G2300/0426 , G09G2300/0452 , G09G2300/0842 , G09G2320/0233
Abstract: A display substrate includes: a first base substrate, and gate lines and data lines on the first base substrate. The gate lines extend in a first direction, and the data lines extend in a second direction. The gate lines and the data lines define pixel units, each of which includes a thin film transistor, a pixel electrode and a common electrode. At least some of the pixel units are respectively configured with conductive bridge lines provided in the same layer as the pixel electrode. In a pixel unit configured with the conductive bridge line, a first hollowed-out structure and a second hollowed-out structure are respectively provided on two opposite sides of the pixel electrode in the first direction. A length of the second hollowed-out structure in the first direction is greater than or equal to 6 μm.
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