公开(公告)号：US09281326B2

公开(公告)日：2016-03-08

申请号：US14568640

申请日：2014-12-12

申请人： BOE TECHNOLOGY GROUP CO., LTD. ,  BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

发明人： Pengju Zhang ,  Yu Zhao ,  Zilong Gao

IPC分类号： H01L27/12

CPC分类号： H01L27/127 ,  H01L27/124 ,  H01L27/1248

摘要： The invention provides an array substrate, a method for manufacturing the array substrate, and a display panel, the array substrate includes a plurality of thin film transistors, and the method includes: S1. preparing a base substrate on which sources and drains of the thin film transistors are formed; S2. forming an insulation layer on the base substrate such that the insulation layer includes spacer regions and a plurality of strip-shaped electrode regions, and every two adjacent strip-shaped electrode regions are separated from each other by the spacer region; S3. forming a spacer layer on the spacer regions of the insulation layer; S4. forming a pattern including strip-shaped electrodes on the strip-shaped electrode regions of the insulation layer; S5. peeling off the spacer layer on the spacer region. The invention can prevent every two adjacent strip-shaped electrodes from interconnecting due to etching residues, so as to improve product performance.

摘要翻译： 本发明提供一种阵列基板，阵列基板的制造方法以及显示面板，该阵列基板包括多个薄膜晶体管，该方法包括：S1。 制备在其上形成薄膜晶体管的源极和漏极的基底基板; S2。 在所述基底基板上形成绝缘层，使得所述绝缘层包括间隔区域和多个条形电极区域，并且每两个相邻的带状电极区域通过所述间隔区域彼此分离; S3。 在绝缘层的间隔区上形成间隔层; S4。 在绝缘层的带状电极区域上形成包括带状电极的图案; S5。 剥离间隔区上的间隔层。 本发明可以防止每两个相邻的带状电极由于蚀刻残留而互连，从而提高产品性能。