-
公开(公告)号：US20210210154A1
公开(公告)日：2021-07-08
申请号：US16645733
申请日：2019-01-09
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G11C19/28 , G09G3/3258
摘要： A shift register is provided, which includes a blanking input circuit, a blanking control circuit, a blanking pull-down circuit, and a shift register circuit. The blanking input circuit may provide a blanking input signal to a first control node according to a second clock signal. The blanking control circuit may provide a first clock signal to a second control node and maintain a voltage difference between the first control node and the second control node, according to a voltage of the first control node. The blanking pull-down circuit may provide a voltage of the second control node to a pull-down node according to the first clock signal. The shift register circuit may provide a shift signal via a shift signal output terminal and a first drive signal via a first drive signal output terminal according to a voltage of the pull-down node.
-
公开(公告)号：US20200035315A1
公开(公告)日：2020-01-30
申请号：US16504652
申请日：2019-07-08
发明人： Zhidong YUAN , Yongqian LI , Can YUAN , Meng LI , Xuelian CHENG
摘要： A shift register unit includes an input module, a first output module, a first pull-down module, a reset module, and a leakage-proof module. The input module is coupled to a pull-up node, a control signal terminal, and an input signal terminal. The first output module is coupled to the pull-up node, a first output terminal, and a second clock signal terminal. The first pull-down module is coupled to the first output terminal, a first signal terminal, and a first clock signal terminal. The reset module is coupled to a reset signal terminal, the pull-up node, and the first output terminal. The leakage-proof module is coupled to a second signal terminal, the first node, and the pull-up node.
-
公开(公告)号：US20190096326A1
公开(公告)日：2019-03-28
申请号：US15991172
申请日：2018-05-29
发明人： Zhidong YUAN , Yongqian LI , Can YUAN , Meng LI , Xuehuan FENG , Zhenfei CAI
IPC分类号： G09G3/3241 , G09G3/3258 , H01L27/32
CPC分类号： G09G3/3241 , G09G3/3233 , G09G3/3258 , G09G2300/0852 , G09G2300/0861 , G09G2310/0251 , G09G2320/0204 , G09G2320/0295 , G09G2320/043 , H01L27/3265
摘要： The present disclosure relates to a pixel compensation circuit, a driving method for the pixel compensation circuit, a display panel and a display device. The pixel compensation circuit includes a reset circuit, a data writer, a compensation circuit, a driver, and a light emitting device. The threshold voltage of the light emitting device may be provided to the driver through the compensation circuit.
-
公开(公告)号：US20190088180A1
公开(公告)日：2019-03-21
申请号：US16134680
申请日：2018-09-18
发明人： Zhenfei CAI , Yongqian LI , Can YUAN , Xuehuan FENG
IPC分类号： G09G3/00 , H01L27/12 , G09G3/3225
摘要： A display panel includes M drive groups disposed side by side in a display area, and M pad groups disposed in a wiring area around the display area. Each pad group includes N data detection terminals. Each drive group includes a plurality of columns of pixel units, and each pixel unit includes N sub-pixels. N≥3, M≥2, and M and N are positive integers. Each data detection terminal is configured to receive a signal output from a detection device. The pad groups are in one-to-one correspondence with the drive groups. Sub-pixels having same color in a drive group of the drive groups are electrically connected to a data detection terminal of one of the pad groups corresponding to the drive group via a same one of data lines.
-
公开(公告)号：US20220262890A1
公开(公告)日：2022-08-18
申请号：US17626434
申请日：2021-02-09
发明人： Leilei CHENG , Yongqian LI , Dacheng ZHANG
IPC分类号： H01L27/32
摘要： A display substrate includes: a base; a cathode power line disposed on the base and located in the peripheral region; a first insulating layer located on a side of a layer in which the cathode power line is located away from the base and having first via hole(s); a cathode layer located on the first insulating layer and electrically connected to the cathode power line through the first via hole(s); and spacer(s) located on a side of the cathode layer proximate to the base, a spacer covering at least a side wall of a first via hole, a thickness of a portion of the spacer covering the side wall decreasing along the side wall and in a direction pointing from an end of the side wall proximate to the base toward an end of the side wall of the first via hole away from the base.
-
公开(公告)号：US20210193001A1
公开(公告)日：2021-06-24
申请号：US16072049
申请日：2018-01-08
发明人： Xuehuan FENG , Xing ZHANG , Qi HU , Pan XU , Yongqian LI , Meng LI , Zhidong YUAN , Zhenfei CAI , Can YUAN
摘要： The present application discloses a shift register, a gate driving circuit and a driving method thereof, and a display apparatus. The shift register includes an input sub-circuit, an output sub-circuit, a reset control sub-circuit, a pull-up node reset sub-circuit, and an output signal reset sub-circuit; the input sub-circuit is configured to pre-charge the pull-up node under the control of a signal input to the first signal input terminal; the output sub-circuit is configured to output, through the signal output terminal, a signal input to the first clock signal input terminal under the control of a potential of the pull-up node; the reset control sub-circuit is configured to control, under the control of a reset signal input to the second signal input terminal, whether the pull-up node reset sub-circuit and the output signal reset sub-circuit operate to reset the pull-up node and the signal output terminal, respectively.
-
公开(公告)号：US20210166621A1
公开(公告)日：2021-06-03
申请号：US16618300
申请日：2018-12-26
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G3/3208 , G11C19/28
摘要： A shift register unit, a gate driving circuit, a display device, and a driving method. The shift register unit includes a blanking input circuit, a display input circuit, an output circuit, and a compensation selection circuit. The blanking input circuit inputs a blanking input signal to a control node, and a blanking signal to a first node in a blanking period of a frame; the display input circuit inputs a display signal to the first node in a display period of the frame in response to a display input signal; the output circuit outputs, under the control of a level of the first node, a composite output signal to an output terminal; the compensation selection circuit is electrically coupled to the output terminal, and charges, in response to a compensation selection control signal, the control node using the composite output signal.
-
公开(公告)号：US20210065630A1
公开(公告)日：2021-03-04
申请号：US16633082
申请日：2019-07-31
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G3/3266
摘要： The present application provides a shift register, a gate driving circuit, a display device and a gate driving method. The shift register includes an input circuit, an inverter circuit and an output circuit. The input circuit, the inverter circuit and the output circuit are coupled to a pull-up node, and the output circuit and the inverter circuit are coupled to a pull-down node. The input circuit is configured to control a voltage at the pull-up node in response to an input signal. The inverter circuit is configured to invert the voltage at the pull-up node and output the inverted voltage to the pull-down node. The output circuit is configured to output a multi-pulse signal within a duration of one frame under control of the voltage at the pull-up node and a voltage at the pull-down node.
-
公开(公告)号：US20210043145A1
公开(公告)日：2021-02-11
申请号：US16825426
申请日：2020-03-20
发明人： Yongqian LI
IPC分类号： G09G3/3266 , H01L27/32
摘要： The present disclosure discloses an array substrate and a driving method thereof, a display panel and a display device. The array substrate comprises: a plurality of gate scanning lines extending in a first direction, a plurality of data lines extending in a second direction and detection signal lines, where the data lines and the gate scanning lines are crossed to define a plurality of pixel circuits arranged in an array. The pixel circuits comprise: first transistors, second transistors, driving transistors, capacitors, and light emitting devices, and in the same pixel circuit, the first transistor and the second transistor are electrically connected to different gate scanning lines.
-
公开(公告)号：US20200211436A1
公开(公告)日：2020-07-02
申请号：US16550848
申请日：2019-08-26
发明人： Zhidong YUAN , Yongqian LI , Can YUAN
摘要： A shift register of the present disclosure includes: an input sub-circuit configured to transmit an input signal from an input signal terminal to a feedback node under the control of a first clock signal terminal; a pull-up control sub-circuit configured to transmit a feedback signal of the feedback node to a pull-up node under the control of the first clock signal terminal; a feedback sub-circuit configured to transmit a first voltage signal from a first voltage signal terminal to the feedback node under the control of the pull-up node; an output sub-circuit configured to transmit a second clock signal from a second clock signal terminal to the output signal terminal under the control of the pull-up node; and a pull-down circuit configured to transmit a second voltage signal from a second voltage signal terminal to the output signal terminal under the control of the first clock signal terminal.
-
-
-
-
-
-
-
-
-
搜索结果
223 条记录 (耗时 0.028 秒)
