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公开(公告)号:US20230269974A1
公开(公告)日:2023-08-24
申请号:US17261034
申请日:2020-03-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yunlong LI , Pengcheng LU , Shuai TIAN , Yu AO , Zhijian ZHU , Yuanlan TIAN
IPC: H10K59/131 , H10K59/124 , H10K59/12 , H10K71/16
CPC classification number: H10K59/131 , H10K59/1201 , H10K59/124 , H10K71/162
Abstract: Provided is a display substrate, including: a silicon-based substrate having a display area, a binding area located on one side of the display area, and a trace area located between the display area and the binding area; a trace protection structure is arranged on the silicon-based substrate in the trace area, and a pad assembly is integrated in the silicon-based substrate in the binding area; and a minimum distance between an edge of an orthographic projection of the trace protection structure on the silicon-based substrate and an edge of an orthographic projection of an opening of the pad assembly on the silicon-based substrate is smaller than a maximum size of one subpixel.
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公开(公告)号:US20220115484A1
公开(公告)日:2022-04-14
申请号:US17266625
申请日:2020-03-27
Applicant: BOE Technology Group Co., Ltd.
Inventor: Pengcheng LU , Shengji YANG , Kuanta HUANG , Xiaochuan CHEN , Yage SONG , Yanming WANG , Hui WANG , Dongdong DUAN , Jiantong LI , Xiao BAI , Yunlong LI , Shuai TIAN , Zhijian ZHU , Yu AO , Junbo WEI , Chao PU , Yuanlan TIAN
IPC: H01L27/32
Abstract: Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a silicon-based substrate and an array structure layer arranged on the silicon-based substrate; a driving transistor and a first power line being arranged in the silicon-based substrate in the display area, a light emitting element being disposed on the array structure layer in the display area, a first electrode of the driving transistor being connected with the first power line, and a second electrode of the driving transistor being connected with an anode of the light emitting element; a power supply electrode and a second power line being arranged in the silicon-based substrate in the peripheral area, the power supply electrode being connected with the second power line.
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