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公开(公告)号:US20240210766A1
公开(公告)日:2024-06-27
申请号:US18547390
申请日:2022-11-29
发明人: Tingting Wang , Xu Wang , Qi Wang , Yan Yan , Yu Ma , Xiaofeng Yin , Zhiqiang Ma , Tao Gong , Haoyan Ren
IPC分类号: G02F1/1343 , G02F1/1362 , H01L27/12
CPC分类号: G02F1/134318 , G02F1/136209 , G02F1/136286 , H01L27/124
摘要: An array substrate includes: a base substrate, a light shielding layer on a first surface of the base substrate, and a plurality of pixel units and a first common electrode bus on a second surface of the base substrate. The base substrate includes a display region, first and second peripheral regions. Orthographic projections of the pixel units on the base substrate are arranged in an array in the display region. At least part of an orthographic projection of the light shielding layer and at least part of an orthographic projection of the first common electrode bus on the base substrate are in the second peripheral region, and the first common electrode bus is electrically connected to the common electrode included in at least one pixel unit. A distribution density of the first common electrode bus in the first peripheral region is smaller than that in the second peripheral region.
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公开(公告)号:US11830398B2
公开(公告)日:2023-11-28
申请号:US17434987
申请日:2020-12-28
发明人: Yan Yan , Yu Ma , Weitao Chen , Xiaopeng Cui
CPC分类号: G09G3/20 , G11C19/28 , G09G2300/0408 , G09G2300/0842 , G09G2310/0267 , G09G2310/0286
摘要: A shift register circuit includes a first pull-down control sub-circuit and a first noise reduction sub-circuit. The first pull-down control sub-circuit includes a first transistor and a second transistor, and a ratio of a width-to-length ratio of a channel of the second transistor to a width-to-length ratio of a channel of the first transistor is greater than 5:1. The first pull-down control sub-circuit transmits, in response to a first voltage signal received at a first voltage signal terminal, the first voltage signal to a first pull-down node through the first transistor, and transmits a second voltage signal received at a second voltage signal terminal to the first pull-down node through the second transistor under control of a voltage of a pull-up node. The first noise reduction sub-circuit transmits the second voltage signal to the pull-up node under control of a voltage of the first pull-down node.
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公开(公告)号:US10936113B2
公开(公告)日:2021-03-02
申请号:US16458310
申请日:2019-07-01
IPC分类号: G06F3/041 , G09G3/3208 , G09G3/36
摘要: The present disclosure relates to the field of display technology and, in particular, to an input control circuit and an input control circuit method; an input control device; and a display panel. The input control circuit includes an input module configured to transmit an input signal to the pull up node in response to the input signal; an output module configured to transmit a clock signal to the signal output terminal in response to a voltage signal at the pull up node; a driving module configured to transmit a common signal to the common electrode block in response to the voltage signal at the pull up node; a reset module configured to transmit a power signal to the pull up node in response to a reset signal; and a bootstrap capacitor connected between the pull up node and the signal output terminal.
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公开(公告)号:US10725579B2
公开(公告)日:2020-07-28
申请号:US15936522
申请日:2018-03-27
发明人: Feng Li , Liang Zhang , Yu Ma , Qi Sang
IPC分类号: G06F3/041 , G09G3/36 , G11C19/28 , G09G3/3266
摘要: A compensation circuit, a gate driving unit, a gate driving method, driving method thereof, and a display device are provided. The compensation circuit includes: a pull-up control node control sub-circuit configured to control a touch ending signal input end to input a touch ending signal to a pull-up control node under the control of a pull-up input end; a pull-up control storage capacitor sub-circuit, a first end of which is connected to the pull-up input end, and a second end of which is connected to the pull-up control node; and a compensation sub-circuit configured to enable the pull-up control node to be electrically connected to the pull-up node voltage output end under the control of the pull-up control node.
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公开(公告)号:US10361227B2
公开(公告)日:2019-07-23
申请号:US15567223
申请日:2017-04-19
发明人: Hongming Zhan , Xibin Shao , Yu Ma , Chao Tian
IPC分类号: H01L27/12 , G02F1/1335 , G02F1/1343 , G02F1/1362 , G02F1/1368
摘要: Array substrate and display panel, and their fabrication methods are provided. The array substrate includes a first base substrate; a pixel electrode over the first base substrate; a first common electrode between the first base substrate and the pixel electrode; and a storage capacitor electrode, between the pixel electrode and the first common electrode and coupled with one of the pixel electrode and the first common electrode. Projections of the first common electrode and the pixel electrode on the first base substrate at least partially overlap with each other.
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公开(公告)号:US20190114951A1
公开(公告)日:2019-04-18
申请号:US15910117
申请日:2018-03-02
摘要: The present disclosure provides a gate driving circuit and a display apparatus. The gate driving circuit comprises a plurality of cascaded shift registers, wherein the shift registers each comprise an input sub-circuit, an output sub-circuit, an output de-noising sub-circuit, a capacitor sub-circuit and a reset sub-circuit, wherein the output de-noising sub-circuit is electrically connected to a first reference voltage signal terminal, a second reference voltage signal terminal and an output signal terminal, and for each stage of shift register except for a first stage of shift register, the second reference voltage signal terminal is electrically connected to an input signal terminal of a stage of shift register immediately prior to the current stage of shift register.
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公开(公告)号:US10256260B2
公开(公告)日:2019-04-09
申请号:US15514328
申请日:2016-02-19
IPC分类号: H01L27/12 , G02F1/1345 , G02F1/1368 , G02F1/1362 , H01L29/417
摘要: Provided is a display substrate. The display substrate includes a base substrate and a thin film transistor which is formed on the base substrate, wherein the thin film transistor includes a drain electrode, and at least one pad structure is arranged on an outer side of the drain electrode; a vertical distance between a top surface of the pad structure and the base substrate is less than the vertical distance between the top surface of the drain electrode and the base substrate, and is greater than the vertical distance between the top surface of the substrate, which is located on one side of the pad structure is far away from the drain electrode, and the base substrate. Further provided are a manufacturing method for the display substrate and a display device.
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公开(公告)号:US20180294290A1
公开(公告)日:2018-10-11
申请号:US15567223
申请日:2017-04-19
发明人: Hongming Zhan , Xibin Shao , Yu Ma , Chao Tian
IPC分类号: H01L27/12
CPC分类号: H01L27/1255 , G02F1/1335 , G02F1/1343 , G02F1/1362 , G02F1/136213 , G02F1/1368 , H01L27/1248 , H01L27/1262
摘要: Array substrate and display panel, and their fabrication methods are provided. The array substrate includes a first base substrate; a pixel electrode over the first base substrate; a first common electrode between the first base substrate and the pixel electrode; and a storage capacitor electrode, between the pixel electrode and the first common electrode and coupled with one of the pixel electrode and the first common electrode. Projections of the first common electrode and the pixel electrode on the first base substrate at least partially overlap with each other.
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9.
公开(公告)号:US20150355515A1
公开(公告)日:2015-12-10
申请号:US14486258
申请日:2014-09-15
IPC分类号: G02F1/1362 , H01L27/12 , G02F1/1368
CPC分类号: G02F1/136213 , G02F1/136227 , G02F1/1368 , H01L27/124 , H01L27/1259
摘要: The present invention provides a pixel structure and a display device, the pixel structure comprises thin film transistors; a substrate, and common electrodes, a gate insulation layer, a passivation layer and pixel electrodes stacked in order on the substrate. The pixel structure further comprises electrically conductive electrodes located between the passivation layer and the gate insulation layer, and the electrically conductive electrodes are located within overlapped regions between the pixel electrodes and the common electrodes and electrically connected with the pixel electrodes, respectively. In the above pixel structure, the common electrode and both of the electrically conductive electrode and the pixel electrode form storage capacitors, so that there is only one film layer, that is, the gate insulation layer, between the pixel electrode and the common electrode, thereby reducing a distance between two parts forming the storage capacitor, increasing the storage capacitor, and improving display performance of the display device.
摘要翻译: 本发明提供一种像素结构和显示装置,该像素结构包括薄膜晶体管; 基板,公共电极,栅极绝缘层,钝化层和在基板上依次层叠的像素电极。 像素结构还包括位于钝化层和栅极绝缘层之间的导电电极,并且导电电极分别位于像素电极和公共电极之间的重叠区域内,并分别与像素电极电连接。 在上述像素结构中,公共电极和导电电极和像素电极两者形成存储电容器,使得在像素电极和公共电极之间仅存在一个膜层,即栅极绝缘层, 从而减少形成存储电容器的两个部件之间的距离,增加存储电容器并提高显示装置的显示性能。
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公开(公告)号:US20240272489A1
公开(公告)日:2024-08-15
申请号:US18022906
申请日:2022-04-26
发明人: Jiliang Zhang , Zhiqiang Ma , Xiaona Liu , Zhitao Li , Yu Ma , Weitao Chen
IPC分类号: G02F1/1339 , G02F1/133 , G02F1/1335 , G02F1/1362 , H01L27/02 , H01L27/12
CPC分类号: G02F1/13398 , G02F1/13306 , G02F1/133512 , G02F1/133514 , G02F1/13394 , G02F1/136286 , H01L27/0248 , H01L27/124 , G02F2202/22
摘要: A display panel and a display device are provided, and relate to the field of displaying. The display panel includes a display area and a peripheral area located at a periphery of the display area. The peripheral area includes a package region and an UDC region located between the display area and the package region. The display panel further includes a transition area surrounding the UDC region, and an opposite substrate and an array substrate arranged opposite to each other. In the UDC region, the opposite substrate and the array substrate are both light-transmissible areas; in the transition area, at least one spacer ring surrounding the UDC region is arranged on the opposite substrate, and each spacer ring includes a plurality of spacers that are spaced apart from each other. The technical solutions of the present disclosure can implement UDCs for the medium-sized display product and the large-sized display product.
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