公开(公告)号：US08966336B2

公开(公告)日：2015-02-24

申请号：US13780372

申请日：2013-02-28

Applicant: Broadcom Corporation

Inventor： Ba-Zhong Shen ,  Andrew J. Blanksby ,  Jason A. Trachewsky

IPC: H03M13/11 ,  H03M13/13 ,  H03M13/03 ,  H03M13/00 ,  H04L1/00 ,  H03M13/33

CPC classification number: H03M13/616 ,  H03M13/033 ,  H03M13/1137 ,  H03M13/114 ,  H03M13/1148 ,  H03M13/116 ,  H03M13/13 ,  H03M13/635 ,  H03M13/6516 ,  H04L1/0057

Abstract: Selective merge and partial reuse LDPC (Low Density Parity Check) code construction for limited number of layers Belief Propagation (BP) decoding. Multiple LDPC matrices may be generated from a base code, such that multiple/distinct LDPC coded signals may be encoded and/or decoded within a singular communication device. Generally speaking, a first LDPC matrix is modified in accordance with one or more operations thereby generating a second LDPC matrix, and the second LDPC matrix is employed in accordance with encoding an information bit thereby generating an LDPC coded signal (alternatively performed using an LDPC generator matrix corresponding to the LDPC matrix) and/or decoding processing of an LDPC coded signal thereby generating an estimate of an information bit encoded therein. The operations performed on the first LDPC matrix may be any one of, or combination of, selectively merging, deleting, partially re-using one or more sub-matrix rows, and/or partitioning sub-matrix rows.

Abstract translation: 选择性合并和部分重用LDPC（低密度奇偶校验）代码构造用于有限数量的层次信念传播（BP）解码。 可以从基本码产生多个LDPC矩阵，使得可以在单个通信设备内编码和/或解码多个/不同的LDPC编码信号。 一般来说，根据一个或多个操作来修改第一个LDPC矩阵，从而生成第二个LDPC矩阵，并且根据对信息比特的编码采用第二个LDPC矩阵，从而生成一个LDPC编码信号（或者使用一个LDPC生成器 对应于LDPC矩阵的矩阵）和/或LDPC编码信号的解码处理，从而生成其中编码的信息比特的估计。 在第一LDPC矩阵上执行的操作可以是选择性地合并，删除，部分地重新使用一个或多个子矩阵行和/或分割子矩阵行中的任何一个或组合。

公开(公告)号：US08621315B2

公开(公告)日：2013-12-31

申请号：US13780947

申请日：2013-02-28

Applicant: Broadcom Corporation

Inventor： Jason A. Trachewsky ,  Ba-Zhong Shen ,  Andrew J. Blanksby ,  Joonsuk Kim

IPC: H03M13/00 ,  H03M13/03

CPC classification number: H04L1/0041 ,  H03M13/116 ,  H03M13/1185 ,  H03M13/6544 ,  H03M13/655 ,  H04L1/005 ,  H04L1/0057 ,  H04L1/0065 ,  H04L1/0071

Abstract: LDPC coding systems for 60 GHz millimeter wave based physical layer extension. LDPC (Low Density Parity Check) encoding in cooperation with sub-carrier interleaving, in the context of orthogonal frequency division multiplexing (OFDM), and appropriate symbol mapping is performed in accordance with transmit processing as may be performed within a communication device. In a receiving communication device, receive processing may be performed on a received signal based on the type of LDPC, sub-carrier interleaving, and symbol mapping thereof. The LDPC code employed in accordance with such LDPC encoding may have a partial-tree like structure. In addition, appropriate manipulation of the bits assigned to respective sub-carriers may be performed to ensure that the bits emplaced in the MSB (Most Significant Bit) location of various symbols has some desired diversity (e.g., from different codewords, from appropriately different locations within a given codeword, etc.).

公开(公告)号：US20130238953A1

公开(公告)日：2013-09-12

申请号：US13872275

申请日：2013-04-29

Applicant: BROADCOM CORPORATION

Inventor： Andrew J. Blanksby ,  Ba-Zhong Shen ,  Jason A. Trachewsky

IPC: H03M13/11

CPC classification number: H03M13/1102 ,  H03M13/033 ,  H03M13/1134 ,  H03M13/1137 ,  H03M13/116 ,  H03M13/1185 ,  H03M13/1188 ,  H03M13/618 ,  H03M13/6362 ,  H03M13/6393 ,  H03M13/6502 ,  H03M13/6516 ,  H03M13/6527 ,  H04L1/005 ,  H04L1/0057

Abstract: Communication device architecture for in-place constructed LDPC (Low Density Parity Check) code. Intelligent design of LDPC codes having similar characteristics there between allows for a very efficient hardware implementation of a communication device that is operative to perform encoding of respective information bit groups using more than one type of LDPC codes. A switching module can select any one of the LDPC codes within an in-place LDPC code for use by an LDPC encoder circuitry to generate an LDPC coded signal. Depending on which sub-matrices of a superimposed LDPC matrix are enabled or disabled, one of the LDPC matrices from within an in-place LDPC code matrix set may be selected. A corresponding, respective generator matrix may be generated from each respective LDPC matrix. Selection among the various LDPC codes may be in accordance with a predetermined sequence, of based operating conditions of the communication device or communication system.

Abstract translation: 用于就地构造的LDPC（低密度奇偶校验）码的通信设备架构。 具有相似特性的LDPC码的智能设计允许通信设备的非常有效的硬件实现，该通信设备可操作以使用多于一种类型的LDPC码执行各个信息位组的编码。 交换模块可以在就地LDPC码内选择任何一个LDPC码，供LDPC编码器电路使用以产生LDPC编码信号。 根据叠加的LDPC矩阵的哪些子矩阵被使能或禁用，可以选择来自就地内LDPC码矩阵集合的LDPC矩阵之一。 可以从每个相应的LDPC矩阵生成相应的相应的生成器矩阵。 各种LDPC码之间的选择可以与通信设备或通信系统的基于操作条件的预定顺序相一致。

公开(公告)号：US08826094B2

公开(公告)日：2014-09-02

申请号：US14067198

申请日：2013-10-30

Applicant: Broadcom Corporation

Inventor： Andrew J. Blanksby ,  Alvin Lai Lin

IPC: H03M13/00 ,  H03M13/11 ,  H03M13/13 ,  H04L1/00

CPC classification number: H03M13/13 ,  H03M13/1137 ,  H03M13/1145 ,  H03M13/116 ,  H04L1/005 ,  H04L1/0057

Abstract: Accumulating LDPC (Low Density Parity Check) decoder. The accumulating decoding architecture described herein is applicable to LDPC codes operating on a parity check matrix, H, consisting of CSI (Cyclic Shifted Identity) sub-matrices (or matrix sub-blocks) or permuted identity sub-matrices (or matrix sub-blocks). In such a structure, the entire LDPC matrix is broken into square sub-matrices such that each sub-matrix consists of either a CSI sub-matrix or a permuted identity sub-matrix, or a null matrix. The iterative decoding process operates by updating of APP (a posteriori probability) or gamma (γ) values and check edge message (λ) values, and this by updating one or more individual rows within a number of sub-matrix rows (or all sub-matrix or sub-block rows) are processed in parallel. The amount of parallelism is specified by the designer and is typically an integer divisor of the sub-matrix (or sub-block) size.

Abstract translation: 累积LDPC（低密度奇偶校验）解码器。 本文描述的累积解码架构可应用于由奇偶校验矩阵H操作的LDPC码，H由CSI（循环移位身份）子矩阵（或矩阵子块）或置换的身份子矩阵（或矩阵子块 ）。 在这种结构中，整个LDPC矩阵被分解为方形子矩阵，使得每个子矩阵由CSI子矩阵或置换的身份子矩阵或空矩阵组成。 迭代解码过程通过更新APP（后验概率）或gamma（γ）值并检查边缘消息（λ）值来操作，并且通过更新多个子矩阵行（或全部子帧）中的一个或多个单独行 - 矩阵或子块行）并行处理。 并行度由设计者指定，通常是子矩阵（或子块）大小的整数除数。

公开(公告)号：US20140059408A1

公开(公告)日：2014-02-27

申请号：US14067198

申请日：2013-10-30

Applicant: Broadcom Corporation

Inventor： Andrew J. Blanksby ,  Alvin Lai Lin

IPC: H03M13/13

CPC classification number: H03M13/13 ,  H03M13/1137 ,  H03M13/1145 ,  H03M13/116 ,  H04L1/005 ,  H04L1/0057

Abstract: Accumulating LDPC (Low Density Parity Check) decoder. The accumulating decoding architecture described herein is applicable to LDPC codes operating on a parity check matrix, H, consisting of CSI (Cyclic Shifted Identity) sub-matrices (or matrix sub-blocks) or permuted identity sub-matrices (or matrix sub-blocks). In such a structure, the entire LDPC matrix is broken into square sub-matrices such that each sub-matrix consists of either a CSI sub-matrix or a permuted identity sub-matrix, or a null matrix. The iterative decoding process operates by updating of APP (a posteriori probability) or gamma (γ) values and check edge message (λ) values, and this by updating one or more individual rows within a number of sub-matrix rows (or all sub-matrix or sub-block rows) are processed in parallel. The amount of parallelism is specified by the designer and is typically an integer divisor of the sub-matrix (or sub-block) size.

Abstract translation: 累积LDPC（低密度奇偶校验）解码器。 本文描述的累积解码架构可应用于由奇偶校验矩阵H操作的LDPC码，H由CSI（循环移位身份）子矩阵（或矩阵子块）或置换的身份子矩阵（或矩阵子块 ）。 在这种结构中，整个LDPC矩阵被分解为方形子矩阵，使得每个子矩阵由CSI子矩阵或置换的身份子矩阵或空矩阵组成。 迭代解码过程通过更新APP（后验概率）或伽马（gamma）值和检查边缘消息（lambda）值来操作，并且这通过更新多个子矩阵行（或全部子帧）中的一个或多个单独的行来操作 - 矩阵或子块行）并行处理。 并行度由设计者指定，通常是子矩阵（或子块）大小的整数除数。

公开(公告)号：US20130179756A1

公开(公告)日：2013-07-11

申请号：US13780372

申请日：2013-02-28

Applicant: BROADCOM CORPORATION

Inventor： Ba-Zhong Shen ,  Andrew J. Blanksby ,  Jason A. Trachewsky

IPC: H03M13/13

CPC classification number: H03M13/616 ,  H03M13/033 ,  H03M13/1137 ,  H03M13/114 ,  H03M13/1148 ,  H03M13/116 ,  H03M13/13 ,  H03M13/635 ,  H03M13/6516 ,  H04L1/0057

Abstract: Selective merge and partial reuse LDPC (Low Density Parity Check) code construction for limited number of layers Belief Propagation (BP) decoding. Multiple LDPC matrices may be generated from a base code, such that multiple/distinct LDPC coded signals may be encoded and/or decoded within a singular communication device. Generally speaking, a first LDPC matrix is modified in accordance with one or more operations thereby generating a second LDPC matrix, and the second LDPC matrix is employed in accordance with encoding an information bit thereby generating an LDPC coded signal (alternatively performed using an LDPC generator matrix corresponding to the LDPC matrix) and/or decoding processing of an LDPC coded signal thereby generating an estimate of an information bit encoded therein. The operations performed on the first LDPC matrix may be any one of, or combination of, selectively merging, deleting, partially re-using one or more sub-matrix rows, and/or partitioning sub-matrix rows.

公开(公告)号：US20150155889A1

公开(公告)日：2015-06-04

申请号：US14614521

申请日：2015-02-05

Applicant: BROADCOM CORPORATION

Inventor： Ba-Zhong Shen ,  Andrew J. Blanksby ,  Jason A. Trachewsky

IPC: H03M13/00 ,  H03M13/11

CPC classification number: H03M13/616 ,  H03M13/033 ,  H03M13/1137 ,  H03M13/114 ,  H03M13/1148 ,  H03M13/116 ,  H03M13/13 ,  H03M13/635 ,  H03M13/6516 ,  H04L1/0057

Abstract: Selective merge and partial reuse LDPC (Low Density Parity Check) code construction for limited number of layers Belief Propagation (BP) decoding. Multiple LDPC matrices may be generated from a base code, such that multiple/distinct LDPC coded signals may be encoded and/or decoded within a singular communication device. Generally speaking, a first LDPC matrix is modified in accordance with one or more operations thereby generating a second LDPC matrix, and the second LDPC matrix is employed in accordance with encoding an information bit thereby generating an LDPC coded signal (alternatively performed using an LDPC generator matrix corresponding to the LDPC matrix) and/or decoding processing of an LDPC coded signal thereby generating an estimate of an information bit encoded therein. The operations performed on the first LDPC matrix may be any one of, or combination of, selectively merging, deleting, partially re-using one or more sub-matrix rows, and/or partitioning sub-matrix rows.

Abstract translation: 选择性合并和部分重用LDPC（低密度奇偶校验）代码构造用于有限数量的层次信念传播（BP）解码。 可以从基本码产生多个LDPC矩阵，使得可以在单个通信设备内编码和/或解码多个/不同的LDPC编码信号。 一般来说，根据一个或多个操作来修改第一个LDPC矩阵，从而生成第二个LDPC矩阵，并且根据对信息比特的编码采用第二个LDPC矩阵，从而生成一个LDPC编码信号（或者使用一个LDPC生成器 对应于LDPC矩阵的矩阵）和/或LDPC编码信号的解码处理，从而生成其中编码的信息比特的估计。 在第一LDPC矩阵上执行的操作可以是选择性地合并，删除，部分地重新使用一个或多个子矩阵行和/或分割子矩阵行中的任何一个或组合。

公开(公告)号：US08799736B2

公开(公告)日：2014-08-05

申请号：US13872275

申请日：2013-04-29

Applicant: Broadcom Corporation

Inventor： Andrew J. Blanksby ,  Ba-Zhong Shen ,  Jason A. Trachewsky

IPC: H03M13/00

CPC classification number: H03M13/1102 ,  H03M13/033 ,  H03M13/1134 ,  H03M13/1137 ,  H03M13/116 ,  H03M13/1185 ,  H03M13/1188 ,  H03M13/618 ,  H03M13/6362 ,  H03M13/6393 ,  H03M13/6502 ,  H03M13/6516 ,  H03M13/6527 ,  H04L1/005 ,  H04L1/0057

Abstract: Communication device architecture for in-place constructed LDPC (Low Density Parity Check) code. Intelligent design of LDPC codes having similar characteristics there between allows for a very efficient hardware implementation of a communication device that is operative to perform encoding of respective information bit groups using more than one type of LDPC codes. A switching module can select any one of the LDPC codes within an in-place LDPC code for use by an LDPC encoder circuitry to generate an LDPC coded signal. Depending on which sub-matrices of a superimposed LDPC matrix are enabled or disabled, one of the LDPC matrices from within an in-place LDPC code matrix set may be selected. A corresponding, respective generator matrix may be generated from each respective LDPC matrix. Selection among the various LDPC codes may be in accordance with a predetermined sequence, of based operating conditions of the communication device or communication system.

Abstract translation: 用于就地构造的LDPC（低密度奇偶校验）码的通信设备架构。 具有相似特性的LDPC码的智能设计允许通信设备的非常有效的硬件实现，该通信设备可操作以使用多于一种类型的LDPC码执行各个信息位组的编码。 交换模块可以在就地LDPC码内选择任何一个LDPC码，供LDPC编码器电路使用以产生LDPC编码信号。 根据叠加的LDPC矩阵的哪些子矩阵被使能或禁用，可以选择来自就地内LDPC码矩阵集合的LDPC矩阵之一。 可以从每个相应的LDPC矩阵生成相应的相应的生成器矩阵。 各种LDPC码之间的选择可以与通信设备或通信系统的基于操作条件的预定顺序相一致。

公开(公告)号：US20130223561A1

公开(公告)日：2013-08-29

申请号：US13780947

申请日：2013-02-28

Applicant: BROADCOM CORPORATION

Inventor： Jason A. Trachewsky ,  Ba-Zhong Shen ,  Andrew J. Blanksby ,  Joonsuk Kim

IPC: H04L1/00

CPC classification number: H04L1/0041 ,  H03M13/116 ,  H03M13/1185 ,  H03M13/6544 ,  H03M13/655 ,  H04L1/005 ,  H04L1/0057 ,  H04L1/0065 ,  H04L1/0071

Abstract: LDPC coding systems for 60 GHz millimeter wave based physical layer extension. LDPC (Low Density Parity Check) encoding in cooperation with sub-carrier interleaving, in the context of orthogonal frequency division multiplexing (OFDM), and appropriate symbol mapping is performed in accordance with transmit processing as may be performed within a communication device. In a receiving communication device, receive processing may be performed on a received signal based on the type of LDPC, sub-carrier interleaving, and symbol mapping thereof. The LDPC code employed in accordance with such LDPC encoding may have a partial-tree like structure. In addition, appropriate manipulation of the bits assigned to respective sub-carriers may be performed to ensure that the bits emplaced in the MSB (Most Significant Bit) location of various symbols has some desired diversity (e.g., from different codewords, from appropriately different locations within a given codeword, etc.).