公开(公告)号：US20140053042A1

公开(公告)日：2014-02-20

申请号：US14063778

申请日：2013-10-25

Applicant: BROADCOM CORPORATION

Inventor： Zhongfeng Wang ,  Chung-Jue Chen ,  Kang Xiao ,  Hongtao Jiang ,  James R. Fife ,  Sudeep Bhoja

IPC: G06F11/10

CPC classification number: G06F11/10 ,  H04L1/005 ,  H04L1/0064

Abstract: Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein. Product code encoding (e.g., employing row and column encoding of matrix formatted bits, selectively with interleaving and/or permutation of the bits therein) may be combined with additional error correction code (ECC) or forward error correction (FEC) coding thereby generating coded bits for use in generating a signal to be launched into a communication channel Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. The redundancy of such coded signals as generated using the principles herein is in the range of approximately 7%, and hard decision decoding may be performed on such coded signals generated herein. In accordance with decoding such signals, various bit decisions (within certain iterations) may be selectively ignored and/or reverted back to previous bit decisions.

Abstract translation: 采用其中选择性附加循环冗余校验（CRC）的二进制产品编码的通信设备。 产品代码编码（例如，采用矩阵格式化的比特的行和列编码，选择性地具有其中的比特的交织和/或置换）可以与附加的纠错码（ECC）或前向纠错（FEC）编码相结合，从而产生编码 用于产生要发送到通信信道中的信号的位可以采用各种ECC / FEC，包括BCH（Bose和Ray-Chaudhuri和Hocquenghem）码，Reed-Solomon（RS）码，LDPC（低密度 奇偶校验）码等。使用本文原理生成的编码信号的冗余在大约7％的范围内，并且可以对这里生成的这种编码信号进行硬判决解码。 根据解码这样的信号，可以选择性地忽略各种位决定（在某些迭代内）和/或还原回到先前的位决定。

公开(公告)号：US08880983B2

公开(公告)日：2014-11-04

申请号：US14063778

申请日：2013-10-25

Applicant: Broadcom Corporation

Inventor： Zhongfeng Wang ,  Chung-Jue Chen ,  Kang Xiao ,  Hongtao Jiang ,  James R. Fife ,  Sudeep Bhoja

IPC: H03M13/00 ,  H04L1/00 ,  G06F11/10

CPC classification number: G06F11/10 ,  H04L1/005 ,  H04L1/0064

Abstract: Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein. Product code encoding (e.g., employing row and column encoding of matrix formatted bits, selectively with interleaving and/or permutation of the bits therein) may be combined with additional error correction code (ECC) or forward error correction (FEC) coding thereby generating coded bits for use in generating a signal to be launched into a communication channel Various ECCs/FECs may be employed including a BCH (Bose and Ray-Chaudhuri, and Hocquenghem) code, a Reed-Solomon (RS) code, an LDPC (Low Density Parity Check) code, etc. The redundancy of such coded signals as generated using the principles herein is in the range of approximately 7%, and hard decision decoding may be performed on such coded signals generated herein. In accordance with decoding such (e.g., possibly by performing bit-flipping), various bit decisions (within certain iterations) may be selectively ignored and/or reverted back to previous bit decisions.

Abstract translation: 采用其中选择性附加循环冗余校验（CRC）的二进制产品编码的通信设备。 产品代码编码（例如，采用矩阵格式化的比特的行和列编码，选择性地具有其中的比特的交织和/或置换）可以与附加的纠错码（ECC）或前向纠错（FEC）编码相结合，从而产生编码 用于产生要发送到通信信道中的信号的位可以采用各种ECC / FEC，包括BCH（Bose和Ray-Chaudhuri和Hocquenghem）码，Reed-Solomon（RS）码，LDPC（低密度 奇偶校验）码等。使用本文原理生成的编码信号的冗余在大约7％的范围内，并且可以对这里生成的这种编码信号进行硬判决解码。 根据这样的解码（例如，可能通过执行比特翻转），可以有选择地忽略各种比特决定（在某些迭代内）和/或返回到先前的比特决定。