公开(公告)号：US3719830A

公开(公告)日：1973-03-06

申请号：US3719830D

申请日：1971-04-05

申请人： BURROUGHS CORP

发明人： ANANIADES CONSTATINE SPYRIDON ,  STOPPER HERBERT

IPC分类号： H03K19/086 ,  H03K19/22

CPC分类号： H03K19/0863

摘要： A logic circuit comprising a signal amplifier, a negative feedback connection from the output to the input of the amplifier, a plurality of input terminals, and a plurality of unilateral conductors coupling the respective input terminals to the amplifier so the amplifier output signal is a logical function of binary signals applied to the input terminals. The amplifier is biased to remain unsaturated in response to the binary signal swing at the input terminals, and the negative feedback connection is designed to introduce negligible delay. In an AND gate, the amplifier is a multi-emitter transistor and the unilateral conductors are the emitter-to-base junctions of the transistor. In an OR gate, the amplifier is a transistor and the unilateral conductors are emitter-follower transistor stages coupling the respective input terminals to the emitter of the transistor amplifier.