Abstract:
A data communication system in which a single control logic function is tested by writing a test control word for one communication line into a time-shared control circuit register from a processor. The control word together with a test line input word generated by the processor are coupled to the control logic for one clock period to perform one step of the logic function, the result being stored in memory. The result is then interrogated in memory to determine if the result of the logic function meets the test.