公开(公告)号：US20220083352A1

公开(公告)日：2022-03-17

申请号：US17537301

申请日：2021-11-29

Applicant: Barefoot Networks, Inc.

Inventor： Jeongkeun LEE ,  Cole Nathan Schlesinger ,  John Nathan FOSTER ,  Han Wang ,  Robert SOULE ,  William Hallahan ,  Steffen Julif Smolka ,  Mon Jed LIU

IPC: G06F9/445 ,  G06F11/36 ,  G06F8/51 ,  H04L12/741

Abstract: A method for verifying data plane programs is provided in some embodiments. Because the behavior of a data plane program (e.g., a program written in the P4 language) is determined in part by the control plane populating match-action tables with specific forwarding rules, in some embodiments, programmers are provided with a way to document assumptions about the control plane using annotations (e.g., in the form of “assertions” or “assumptions” about the state based on the unknown control plane contribution). In some embodiments, annotations are added automatically to verify common properties, including checking that every header read or written is valid, that every expression has a well-defined value, and that all standard metadata is manipulated correctly. The method in some embodiments translates programs from a first language (e.g., P4) to a second language (e.g., Guarded Command Language (GCL)) for verification by a satisfiability modulo theory (SMT) solver.