Source Routing Design with Simplified Forwarding Elements

    公开(公告)号:US20190182143A1

    公开(公告)日:2019-06-13

    申请号:US15948946

    申请日:2018-04-09

    Abstract: Some embodiments provide a network that includes (i) multiple forwarding elements, (ii) a set of one or more global control plane (GCP) servers, and (iii) multiple end-node machines. The GCP servers maintain topological information about connections between the forwarding elements. Each of the end-node machines receives the topological information, identifies a source-routing path for a message sent by the machine, and embeds the source-routing path in a source-routing message header that includes an egress port for each forwarding element along the path.

    Execution of Packet-Specified Actions at Forwarding Element

    公开(公告)号:US20190182367A1

    公开(公告)日:2019-06-13

    申请号:US15948992

    申请日:2018-04-09

    Abstract: Some embodiments provide a method for a particular forwarding element (FE) in a network of FEs. The method receives a packet at the particular FE. The packet includes a packet header that includes, for each of multiple FEs along a path from a source of the packet to a destination of the packet, (i) an identifier for the FE and (ii) a set of one or more actions for the FE to perform on the packet. The method parses the packet header to identify the set of actions for the particular FE. The method performs the identified set of actions.

    Generation of Path Failure Message at Forwarding Element

    公开(公告)号:US20190182149A1

    公开(公告)日:2019-06-13

    申请号:US15948991

    申请日:2018-04-09

    Abstract: Some embodiments provide a method for a particular FE in a network of FEs. The method receives a data message at a first port of the FE. The data message includes a header that specifies an egress port for each FE along a path from a source of the data message to a destination of the data message and an ingress port for at least each FE along the path that the data message has previously traversed. The method determines that the particular egress port specified for the FE is a second port that is not operational. The method generates a path failure message specifying that the second port is not operational and including a header that uses the egress ports and ingress ports in the data message. The method sends the path failure message out of the first port for delivery to the source of the data message.

    DATA PLANE PROGRAM VERIFICATION
    8.
    发明申请

    公开(公告)号:US20190108045A1

    公开(公告)日:2019-04-11

    申请号:US16022601

    申请日:2018-06-28

    Abstract: A method for verifying data plane programs is provided in some embodiments. Because the behavior of a data plane program (e.g., a program written in the P4 language) is determined in part by the control plane populating match-action tables with specific forwarding rules, in some embodiments, programmers are provided with a way to document assumptions about the control plane using annotations (e.g., in the form of “assertions” or “assumptions” about the state based on the unknown control plane contribution). In some embodiments, annotations are added automatically to verify common properties, including checking that every header read or written is valid, that every expression has a well-defined value, and that all standard metadata is manipulated correctly. The method in some embodiments translates programs from a first language (e.g., P4) to a second language (e.g., Guarded Command Language (GCL)) for verification by a satisfiability modulo theory (SMT) solver.

    Data plane program verification
    9.
    发明授权

    公开(公告)号:US11188355B2

    公开(公告)日:2021-11-30

    申请号:US16022601

    申请日:2018-06-28

    Abstract: A method for verifying data plane programs is provided in some embodiments. Because the behavior of a data plane program (e.g., a program written in the P4 language) is determined in part by the control plane populating match-action tables with specific forwarding rules, in some embodiments, programmers are provided with a way to document assumptions about the control plane using annotations (e.g., in the form of “assertions” or “assumptions” about the state based on the unknown control plane contribution). In some embodiments, annotations are added automatically to verify common properties, including checking that every header read or written is valid, that every expression has a well-defined value, and that all standard metadata is manipulated correctly. The method in some embodiments translates programs from a first language (e.g., P4) to a second language (e.g., Guarded Command Language (GCL)) for verification by a satisfiability modulo theory (SMT) solver.

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