Low voltage charge employing optimized clock amplitudes
    1.
    发明授权
    Low voltage charge employing optimized clock amplitudes 有权
    采用优化时钟幅度的低电压电荷

    公开(公告)号:US06522559B2

    公开(公告)日:2003-02-18

    申请号:US10003898

    申请日:2001-10-25

    IPC分类号: H02M318

    CPC分类号: H02M3/073 H02M2003/076

    摘要: A charge pump system and associated variable-amplitude clock generation circuitry are provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and charge pump circuitry. The two phase bootstrapping circuits are both responsive to the clock and provide first and second phase clock signals. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal. The charge pump circuitry is responsive to the power supply voltage and the first and second phase clocks and uses native transistors that have lower threshold voltages. A high voltage is produced from the charge pump circuitry by alternately adding charge to the power supply voltage in each cycle of the first and second phase clock signals. The first and second phase clock signals increase in voltage as the voltage level in the charge pump increases in order to overcome increased effective transistor threshold voltages.

    摘要翻译: 提供电荷泵系统和相关联的可变幅度时钟产生电路,用于在诸如擦除和编程电可擦除可编程只读存储器(EEPROM)阵列的应用中从低的初始电压产生高电压。 电荷泵系统使用电源电压和时钟,并且包括第一相自举电路,逆变器和第二相自举电路以及电荷泵电路。 两相自举电路都响应时钟并提供第一和第二相位时钟信号。 逆变器连接到第二相自举电路,使得第二相位时钟信号与第一时钟信号相位相反。 电荷泵电路响应于电源电压和第一和第二相位时钟,并且使用具有较低阈值电压的天然晶体管。 通过在第一和第二相位时钟信号的每个周期中交替地向电源电压中加入电荷,从电荷泵电路产生高电压。 随着电荷泵中的电压电平增加,第一和第二相位时钟信号的电压增加,以克服增加的有效晶体管阈值电压。

    Low voltage charge pump employing distributed charge boosting

    公开(公告)号:US06385065B1

    公开(公告)日:2002-05-07

    申请号:US09662207

    申请日:2000-09-14

    IPC分类号: H02M318

    CPC分类号: H02M3/073 H02M2003/076

    摘要: A charge pump system, including a charge pump and associated distributed clock generation circuitry, is provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and a two-stage charge pump. The two phase bootstrapping circuits are both responsive to the clock and use a distributed bootstrapping scheme to provide first and second phase clock signals with fixed multiples of the power supply voltage in order to overcome increased effective transistor threshold voltages, increase efficiency, and allow for charge boosting in a limited number of stages. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal. The two-stage charge pump is responsive to the power supply voltage and the first and second phase clocks and uses native transistors that have lower threshold voltages. A high voltage is produced from the two-stage charge pump by alternately adding charge to the power supply voltage in each cycle of the first and second phase clock signals.

    Low voltage charge pump employing optimized clock amplitudes
    3.
    发明授权
    Low voltage charge pump employing optimized clock amplitudes 有权
    低压电荷泵采用优化的时钟幅度

    公开(公告)号:US06356469B1

    公开(公告)日:2002-03-12

    申请号:US09661485

    申请日:2000-09-14

    IPC分类号: H02M318

    CPC分类号: H02M3/073 H02M2003/076

    摘要: A charge pump system and associated variable-amplitude clock generation circuitry are provided for generating high voltages from a low initial voltage in applications such as erasing and programming electrically erasable programmable read only memory (EEPROM) arrays. The charge pump system uses a power supply voltage and a clock and includes a first phase bootstrapping circuit, an inverter, and a second phase bootstrapping circuit, and charge pump circuitry. The two phase bootstrapping circuits are both responsive to the clock and provide first and second phase clock signals. The inverter is connected to the second phase bootstrapping circuit, causing the second phase clock signal to be opposite in phase from the first clock signal. The charge pump circuitry is responsive to the power supply voltage and the first and second phase clocks and uses native transistors that have lower threshold voltages. A high voltage is produced from the charge pump circuitry by alternately adding charge to the power supply voltage in each cycle of the first and second phase clock signals. The first and second phase clock signals increase in voltage as the voltage level in the charge pump increases in order to overcome increased effective transistor threshold voltages.

    摘要翻译: 提供电荷泵系统和相关联的可变幅度时钟产生电路,用于在诸如擦除和编程电可擦除可编程只读存储器(EEPROM)阵列的应用中从低的初始电压产生高电压。 电荷泵系统使用电源电压和时钟,并且包括第一相自举电路,逆变器和第二相自举电路以及电荷泵电路。 两相自举电路都响应时钟并提供第一和第二相位时钟信号。 逆变器连接到第二相自举电路,使得第二相位时钟信号与第一时钟信号相位相反。 电荷泵电路响应于电源电压和第一和第二相位时钟,并且使用具有较低阈值电压的天然晶体管。 通过在第一和第二相位时钟信号的每个周期中交替地向电源电压中加入电荷,从电荷泵电路产生高电压。 随着电荷泵中的电压电平增加,第一和第二相位时钟信号的电压增加,以克服增加的有效晶体管阈值电压。