摘要:
To permit a switched-capacitor-type stabilized power supply device to operate stably until the battery power falls considerably low, it needs to be provided with a voltage step-up circuit with a high voltage step-up factor. However, inconveniently, in a conventional switched-capacitor-type stabilized power supply device, increasing the voltage step-up factor of the voltage step-up circuit increases the difference between the voltage stepped-up by the voltage step-up circuit when the battery voltage is still high and the set output voltage, and thus lowers power conversion efficiency. By contrast, a switched-capacitor-type stabilized power supply device of the invention has a plurality of voltage step-up circuits each having a different voltage step-up factor, a switching circuit for connecting and disconnecting an input terminal, to which a direct-current voltage is applied, to and from the voltage step-up circuits, and a switching control circuit for controlling the switching circuit according to the input level to and/or the output level from the switched-capacitor-type stabilized power supply device.
摘要:
A reference voltage for obtaining a desired output voltage value, and an output voltage are inputted to an operational amplifier. A PMOS transistor whose on/off operation is controlled by the operational amplifier, outputs an internal node voltage therefrom. A switch control circuit outputs a signal constant in duty ratio, for activating CHG switches and DCHG switches respectively. A voltage dividing capacitor and an output capacitor respectively repeat charging and discharging based on a switching pulse constant in duty ratio. Accordingly, a stable output voltage obtained by series/parallel connection switching operations of two capacitors results in ½ of the internal node voltage.
摘要:
A voltage booster method and circuit reduce the number of capacitors required for a voltage boost. First, a first terminal of a first auxiliary capacitor is connected to a ground line and a second terminal of the first auxiliary capacitor is connected to the supply line of an input voltage. Second, a first terminal of a second auxiliary capacitor is connected to the ground line, the first terminal of the first auxiliary capacitor is switched to the supply line of the input voltage, and the second terminal of the first auxiliary capacitor is switched and connected to a second terminal of the second auxiliary capacitor. Third, the first terminal of the second auxiliary capacitor is switched to the second terminal of the first auxiliary capacitor, and the second terminal of the second auxiliary capacitor is switched and connected to the output line.
摘要:
A charge pump receives a direct current input voltage at a first level and provides a substantially constant direct current output voltage at a second level. Variations of the input voltage level above and below the output voltage level are handled seamlessly by a continuous mode control scheme that controls a charging current of the charge pump. The charge pump includes an error amplifier which produces a control signal based on a comparison of a feedback voltage proportional to the output voltage and a reference voltage. The control signal controls a variable current source to regulate the charging current provided to a charge storage component.
摘要:
For a semiconductor integrated circuit having an internal booster circuit such as a flash memory, voltage booster circuits capable of generating a boosted voltage 10 times or more as high as a relatively low source voltage is to be realized. Charge pumps for carrying out first stage voltage boosting on the basis of a source voltage are configured of parallel capacity type units, and charge pumps for carrying out second stage voltage boosting on the basis of the boosted voltage generated by the first charge pumps are configured of serial capacity type units.
摘要:
A semiconductor device that is capable of preventing erroneous operation such as momentary lighting, comprising a booster circuit to which first and second power supply potentials VDD and VSS are supplied from an external power source, for boosting the absolute value of the potential difference therebetween and charging the boosted potential to a capacitor. This booster circuit has a plurality of transistors and a plurality of capacitors, and the boosted potential is charged to one of the plurality of capacitors in accordance with how the plurality of transistors are turned on or off. The gates of a plurality of transistors are connected to output lines of first and second NAND circuits, to which the output of a comparator is input through a buffer. The output of the comparator is at a low level when the second power supply potential VSS is higher than a reference potential VREG, such as when the power is forcibly cut, in which case the charge in one of the plurality of capacitors is discharged, based on the outputs from the first and second NAND circuits.
摘要:
There is disclosed a power supply system comprising capacitors that are connected switchably via a small number of switches to decrease variations of an output voltage. The switches comprise a series connection switch and first and second sets of switches. A control means controls the first set of switches, the second set of switches, and the series connection switch to switch connection of the capacitors of the first and second sets among a first state in which the first set of capacitors is connected in series with the second set of capacitors, a second state in which the first set of capacitors is connected in parallel with the second set of capacitors, and a third state in which one or more capacitors of the first set are connected in parallel with one or more capacitors of the second set.
摘要:
A charge pump circuit includes feedback level shifters for providing threshold voltage cancellation and feedforward level shifters for providing boosted clocking signals to generate a high pumped output voltage from a low supply voltage. The charge pump circuit includes plurality of switching circuits each including first and second signal terminals and a control terminal adapted to receive a control signal. Each switching circuit couples its first signal terminal to its second signal terminal responsive to the control signal. The signal terminals of the plurality of switching circuits are connected in series between an input voltage node and an output voltage node. A plurality of energy storage circuits each have a first terminal coupled to a respective voltage node formed by the interconnection between adjacent switching circuits and a second terminal adapted to receive a clocking signal. At least one feedback level shifting circuit is coupled between a selected one of the voltage nodes and the control terminal of a switching circuit between the selected voltage node the input node, each feedback level shifting circuit applying the voltage on the voltage node to the control terminal responsive to a clock signal. At least one feedforward level shifting circuit is coupled between a selected one of the voltage nodes and the second terminal of one of the energy storage circuits coupled to a voltage node between the selected voltage node and the output node. Each feedforward level shifting circuit applies the voltage on the voltage node to the second terminal responsive to a clock signal.
摘要:
This invention discloses the concept of the integration of the four terminal switcher and the capacitor pairs for the DC to DC converter or power supplier. This invention can be built by IC process as the DC to DC converter or power supply alone or used as power supply or converter module or block for distributed power in the System-on-Chip. This invention discloses the basic structure of the DC to DC converter or power supply module on standard CMOS IC process and on SOI substrates. This basic structure of the DC to DC converter or power supply module provides high current and low voltage applications for future generations of ICs.
摘要:
A method and apparatus for providing a charge pump that is particularly useful for generating high voltages and high currents for erasing and programming flash electrically-erasable programmable read only memory arrays (Flash EEPROMs). The invention includes an efficient method and circuit for generating a pumped voltage with no voltage drop from one stage to the next by using a simple two-phase clocking scheme and an auxiliary pump to gate a larger primary pump. One feature allows adjustment of the level of voltage pumping to accommodate higher voltage power supplies.