公开(公告)号：US08618859B1

公开(公告)日：2013-12-31

申请号：US13666881

申请日：2012-11-01

Applicant: Broadcom Corporation

Inventor： David Murphy ,  Hooman Darabi ,  Hao Xu

IPC: H03K3/00

CPC classification number: H03K5/15013

Abstract: A method for generation of high frequency, non-overlapping clocks may include receiving input clock signals at a clock input node of a circuit. Multiple feedback signals may be received at a number of input feedback nodes of the circuit. At a startup node, a startup signal of the circuit may be received, and, in response to receiving the startup signal, an output clock may be generated at a predefined portion of at least one of the received input clock signals. A stable high frequency output clock may be generated at an output stage by utilizing the feedback signals received by the input feedback nodes.

Abstract translation: 用于产生高频非重叠时钟的方法可以包括在电路的时钟输入节点处接收输入时钟信号。 可以在电路的多个输入反馈节点处接收多个反馈信号。 在启动节点处，可以接收电路的启动信号，并且响应于接收到启动信号，可以在所接收的输入时钟信号中的至少一个的预定义部分处生成输出时钟。 可以通过利用由输入反馈节点接收的反馈信号在输出级产生稳定的高频输出时钟。